19.82/6.25	YES
19.82/6.26	proof of /export/starexec/sandbox/benchmark/theBenchmark.c
19.82/6.26	# AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty
19.82/6.26	
19.82/6.26	
19.82/6.26	Termination of the given C Problem could be proven:
19.82/6.26	
19.82/6.26	(0) C Problem
19.82/6.26	(1) CToLLVMProof [EQUIVALENT, 175 ms]
19.82/6.26	(2) LLVM problem
19.82/6.26	(3) LLVMToTerminationGraphProof [EQUIVALENT, 1795 ms]
19.82/6.26	(4) LLVM Symbolic Execution Graph
19.82/6.26	(5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms]
19.82/6.26	(6) AND
19.82/6.26	    (7) LLVM Symbolic Execution SCC
19.82/6.26	        (8) SCC2IRS [SOUND, 68 ms]
19.82/6.26	        (9) IntTRS
19.82/6.26	        (10) IntTRSCompressionProof [EQUIVALENT, 0 ms]
19.82/6.26	        (11) IntTRS
19.82/6.26	        (12) PolynomialOrderProcessor [EQUIVALENT, 12 ms]
19.82/6.26	        (13) YES
19.82/6.26	    (14) LLVM Symbolic Execution SCC
19.82/6.26	        (15) SCC2IRS [SOUND, 54 ms]
19.82/6.26	        (16) IntTRS
19.82/6.26	        (17) IntTRSCompressionProof [EQUIVALENT, 0 ms]
19.82/6.26	        (18) IntTRS
19.82/6.26	        (19) RankingReductionPairProof [EQUIVALENT, 6 ms]
19.82/6.26	        (20) YES
19.82/6.26	
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(0)
19.82/6.26	Obligation:
19.82/6.26	c file /export/starexec/sandbox/benchmark/theBenchmark.c
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(1) CToLLVMProof (EQUIVALENT)
19.82/6.26	Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM.
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(2)
19.82/6.26	Obligation:
19.82/6.26	LLVM Problem
19.82/6.26	
19.82/6.26	Aliases:
19.82/6.26	
19.82/6.26	Data layout:
19.82/6.26	
19.82/6.26	"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
19.82/6.26	
19.82/6.26	Machine:
19.82/6.26	
19.82/6.26	"x86_64-pc-linux-gnu"
19.82/6.26	
19.82/6.26	Type definitions:
19.82/6.26	
19.82/6.26	Global variables:
19.82/6.26	
19.82/6.26	Function declarations and definitions:
19.82/6.26	
19.82/6.26	*BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc
19.82/6.26	*BasicFunctionTypename: "test_fun" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (x i32, y i32) variableLength: false visibilityType: DEFAULT callingConvention: ccc
19.82/6.26		0:
19.82/6.26			%1 = alloca i32, align 4
19.82/6.26			%2 = alloca i32, align 4
19.82/6.26			%x_ref = alloca *i32, align 8
19.82/6.26			%y_ref = alloca *i32, align 8
19.82/6.26			store %x, %1
19.82/6.26			store %y, %2
19.82/6.26			%3 = alloca i8, numElementsLit: 4
19.82/6.26			%4 = bitcast *i8 %3 to *i32
19.82/6.26			store %4, %x_ref
19.82/6.26			%5 = alloca i8, numElementsLit: 4
19.82/6.26			%6 = bitcast *i8 %5 to *i32
19.82/6.26			store %6, %y_ref
19.82/6.26			%7 = load %1
19.82/6.26			%8 = load %x_ref
19.82/6.26			store %7, %8
19.82/6.26			%9 = load %2
19.82/6.26			%10 = load %y_ref
19.82/6.26			store %9, %10
19.82/6.26			br %11
19.82/6.26		11:
19.82/6.26			%12 = load %x_ref
19.82/6.26			%13 = load %12
19.82/6.26			%14 = icmp sgt %13 0
19.82/6.26			br %14, %15, %19
19.82/6.26		15:
19.82/6.26			%16 = load %y_ref
19.82/6.26			%17 = load %16
19.82/6.26			%18 = icmp sgt %17 0
19.82/6.26			br %19
19.82/6.26		19:
19.82/6.26			%20 = phi [0, %11], [%18, %15]
19.82/6.26			br %20, %21, %50
19.82/6.26		21:
19.82/6.26			%22 = load %x_ref
19.82/6.26			%23 = load %22
19.82/6.26			%24 = load %y_ref
19.82/6.26			%25 = load %24
19.82/6.26			%26 = icmp sgt %23 %25
19.82/6.26			br %26, %27, %38
19.82/6.26		27:
19.82/6.26			br %28
19.82/6.26		28:
19.82/6.26			%29 = load %x_ref
19.82/6.26			%30 = load %29
19.82/6.26			%31 = icmp sgt %30 0
19.82/6.26			br %31, %32, %37
19.82/6.26		32:
19.82/6.26			%33 = load %x_ref
19.82/6.26			%34 = load %33
19.82/6.26			%35 = sub %34 1
19.82/6.26			%36 = load %x_ref
19.82/6.26			store %35, %36
19.82/6.26			br %28
19.82/6.26		37:
19.82/6.26			br %49
19.82/6.26		38:
19.82/6.26			br %39
19.82/6.26		39:
19.82/6.26			%40 = load %y_ref
19.82/6.26			%41 = load %40
19.82/6.26			%42 = icmp sgt %41 0
19.82/6.26			br %42, %43, %48
19.82/6.26		43:
19.82/6.26			%44 = load %y_ref
19.82/6.26			%45 = load %44
19.82/6.26			%46 = sub %45 1
19.82/6.26			%47 = load %y_ref
19.82/6.26			store %46, %47
19.82/6.26			br %39
19.82/6.26		48:
19.82/6.26			br %49
19.82/6.26		49:
19.82/6.26			br %11
19.82/6.26		50:
19.82/6.26			%51 = load %x_ref
19.82/6.26			%52 = load %51
19.82/6.26			%53 = load %y_ref
19.82/6.26			%54 = load %53
19.82/6.26			%55 = add %52 %54
19.82/6.26			ret %55
19.82/6.26	
19.82/6.26	*BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc
19.82/6.26		0:
19.82/6.26			%1 = alloca i32, align 4
19.82/6.26			store 0, %1
19.82/6.26			%2 = call i32 @__VERIFIER_nondet_int()
19.82/6.26			%3 = call i32 @__VERIFIER_nondet_int()
19.82/6.26			%4 = call i32 @test_fun(i32 %2, i32 %3)
19.82/6.26			ret %4
19.82/6.26	
19.82/6.26	
19.82/6.26	Analyze Termination of all function calls matching the pattern:
19.82/6.26	main()
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(3) LLVMToTerminationGraphProof (EQUIVALENT)
19.82/6.26	Constructed symbolic execution graph for LLVM program and proved memory safety.
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(4)
19.82/6.26	Obligation:
19.82/6.26	SE Graph
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(5) SymbolicExecutionGraphToSCCProof (SOUND)
19.82/6.26	Splitted symbolic execution graph to 2 SCCs.
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(6)
19.82/6.26	Complex Obligation (AND)
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(7)
19.82/6.26	Obligation:
19.82/6.26	SCC
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(8) SCC2IRS (SOUND)
19.82/6.26	Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 
19.82/6.26	Generated rules. Obtained 12 rulesP rules:
19.82/6.26	f_381(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v108, v109, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 4, 8) -> f_384(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 4, 8) :|: 0 = 0
19.82/6.26	f_384(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 4, 8) -> f_387(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: 0 < v109 && 2 <= v108 && 2 <= v99
19.82/6.26	f_387(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_391(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_391(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_395(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: TRUE
19.82/6.26	f_395(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_399(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_399(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v108, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_403(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_403(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_407(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: 1 + v119 = v109 && 0 <= v119
19.82/6.26	f_407(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_411(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_411(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_415(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: TRUE
19.82/6.26	f_415(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_418(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) :|: TRUE
19.82/6.26	f_418(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 2, 4, 8) -> f_379(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v109, v119, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 4, 8) :|: TRUE
19.82/6.26	f_379(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v108, v109, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 4, 8) -> f_381(v98, v99, v100, v101, v102, v103, v104, v105, 1, 0, v108, v109, v110, v111, v112, v113, v114, v115, v116, v117, 3, 7, 4, 8) :|: 0 = 0
19.82/6.26	Combined rules. Obtained 1 rulesP rules:
19.82/6.26	f_381(v98:0, v99:0, v100:0, v101:0, v102:0, v103:0, v104:0, v105:0, 1, 0, v108:0, 1 + v119:0, v110:0, v111:0, v112:0, v113:0, v114:0, v115:0, v116:0, v117:0, 3, 7, 4, 8) -> f_381(v98:0, v99:0, v100:0, v101:0, v102:0, v103:0, v104:0, v105:0, 1, 0, 1 + v119:0, v119:0, v110:0, v111:0, v112:0, v113:0, v114:0, v115:0, v116:0, v117:0, 3, 7, 4, 8) :|: v108:0 > 1 && v119:0 > -1 && v99:0 > 1
19.82/6.26	Filtered unneeded arguments:
19.82/6.26	   f_381(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24) -> f_381(x2, x11, x12)
19.82/6.26	Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules:
19.82/6.26	f_381(v99:0, v108:0, sum~cons_1~v119:0) -> f_381(v99:0, 1 + v119:0, v119:0) :|: v119:0 > -1 && v99:0 > 1 && v108:0 > 1 && sum~cons_1~v119:0 = 1 + v119:0
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(9)
19.82/6.26	Obligation:
19.82/6.26	Rules:
19.82/6.26	f_381(v99:0, v108:0, sum~cons_1~v119:0) -> f_381(v99:0, 1 + v119:0, v119:0) :|: v119:0 > -1 && v99:0 > 1 && v108:0 > 1 && sum~cons_1~v119:0 = 1 + v119:0
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(10) IntTRSCompressionProof (EQUIVALENT)
19.82/6.26	Compressed rules.
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(11)
19.82/6.26	Obligation:
19.82/6.26	Rules:
19.82/6.26	f_381(v99:0:0, v108:0:0, sum~cons_1~v119:0:0) -> f_381(v99:0:0, 1 + v119:0:0, v119:0:0) :|: v119:0:0 > -1 && v99:0:0 > 1 && v108:0:0 > 1 && sum~cons_1~v119:0:0 = 1 + v119:0:0
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(12) PolynomialOrderProcessor (EQUIVALENT)
19.82/6.26	Found the following polynomial interpretation:
19.82/6.26	[f_381(x, x1, x2)] = x2
19.82/6.26	
19.82/6.26	The following rules are decreasing:
19.82/6.26	f_381(v99:0:0, v108:0:0, sum~cons_1~v119:0:0) -> f_381(v99:0:0, 1 + v119:0:0, v119:0:0) :|: v119:0:0 > -1 && v99:0:0 > 1 && v108:0:0 > 1 && sum~cons_1~v119:0:0 = 1 + v119:0:0
19.82/6.26	The following rules are bounded:
19.82/6.26	f_381(v99:0:0, v108:0:0, sum~cons_1~v119:0:0) -> f_381(v99:0:0, 1 + v119:0:0, v119:0:0) :|: v119:0:0 > -1 && v99:0:0 > 1 && v108:0:0 > 1 && sum~cons_1~v119:0:0 = 1 + v119:0:0
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(13)
19.82/6.26	YES
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(14)
19.82/6.26	Obligation:
19.82/6.26	SCC
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(15) SCC2IRS (SOUND)
19.82/6.26	Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 
19.82/6.26	Generated rules. Obtained 12 rulesP rules:
19.82/6.26	f_377(v77, v78, v79, v80, v81, v82, v83, v84, 1, v86, v87, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_380(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_380(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_382(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: 0 < v87 && 2 <= v86
19.82/6.26	f_382(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_385(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_385(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_389(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: TRUE
19.82/6.26	f_389(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_393(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_393(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v86, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_397(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_397(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_401(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: 1 + v118 = v87 && 0 <= v118
19.82/6.26	f_401(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_405(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	f_405(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_409(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: TRUE
19.82/6.26	f_409(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_413(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: TRUE
19.82/6.26	f_413(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_374(v77, v78, v79, v80, v81, v82, v83, v84, 1, v87, v118, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: TRUE
19.82/6.26	f_374(v77, v78, v79, v80, v81, v82, v83, v84, 1, v86, v87, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) -> f_377(v77, v78, v79, v80, v81, v82, v83, v84, 1, v86, v87, v88, v89, v90, v91, v92, v93, v94, v95, 0, 3, 7, 2, 4, 8) :|: 0 = 0
19.82/6.26	Combined rules. Obtained 1 rulesP rules:
19.82/6.26	f_377(v77:0, v78:0, v79:0, v80:0, v81:0, v82:0, v83:0, v84:0, 1, v86:0, 1 + v118:0, v88:0, v89:0, v90:0, v91:0, v92:0, v93:0, v94:0, v95:0, 0, 3, 7, 2, 4, 8) -> f_377(v77:0, v78:0, v79:0, v80:0, v81:0, v82:0, v83:0, v84:0, 1, 1 + v118:0, v118:0, v88:0, v89:0, v90:0, v91:0, v92:0, v93:0, v94:0, v95:0, 0, 3, 7, 2, 4, 8) :|: v86:0 > 1 && v118:0 > -1
19.82/6.26	Filtered unneeded arguments:
19.82/6.26	   f_377(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25) -> f_377(x10, x11)
19.82/6.26	Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules:
19.82/6.26	f_377(v86:0, sum~cons_1~v118:0) -> f_377(1 + v118:0, v118:0) :|: v86:0 > 1 && v118:0 > -1 && sum~cons_1~v118:0 = 1 + v118:0
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(16)
19.82/6.26	Obligation:
19.82/6.26	Rules:
19.82/6.26	f_377(v86:0, sum~cons_1~v118:0) -> f_377(1 + v118:0, v118:0) :|: v86:0 > 1 && v118:0 > -1 && sum~cons_1~v118:0 = 1 + v118:0
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(17) IntTRSCompressionProof (EQUIVALENT)
19.82/6.26	Compressed rules.
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(18)
19.82/6.26	Obligation:
19.82/6.26	Rules:
19.82/6.26	f_377(v86:0:0, sum~cons_1~v118:0:0) -> f_377(1 + v118:0:0, v118:0:0) :|: v86:0:0 > 1 && v118:0:0 > -1 && sum~cons_1~v118:0:0 = 1 + v118:0:0
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(19) RankingReductionPairProof (EQUIVALENT)
19.82/6.26	Interpretation:
19.82/6.26	[ f_377 ] = f_377_2
19.82/6.26	
19.82/6.26	The following rules are decreasing:
19.82/6.26	f_377(v86:0:0, sum~cons_1~v118:0:0) -> f_377(1 + v118:0:0, v118:0:0) :|: v86:0:0 > 1 && v118:0:0 > -1 && sum~cons_1~v118:0:0 = 1 + v118:0:0
19.82/6.26	
19.82/6.26	The following rules are bounded:
19.82/6.26	f_377(v86:0:0, sum~cons_1~v118:0:0) -> f_377(1 + v118:0:0, v118:0:0) :|: v86:0:0 > 1 && v118:0:0 > -1 && sum~cons_1~v118:0:0 = 1 + v118:0:0
19.82/6.26	
19.82/6.26	
19.82/6.26	----------------------------------------
19.82/6.26	
19.82/6.26	(20)
19.82/6.26	YES
20.23/6.40	EOF