39.41/11.91	YES
39.41/11.94	proof of /export/starexec/sandbox/benchmark/theBenchmark.c
39.41/11.94	# AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty
39.41/11.94	
39.41/11.94	
39.41/11.94	Termination of the given C Problem could be proven:
39.41/11.94	
39.41/11.94	(0) C Problem
39.41/11.94	(1) CToLLVMProof [EQUIVALENT, 173 ms]
39.41/11.94	(2) LLVM problem
39.41/11.94	(3) LLVMToTerminationGraphProof [EQUIVALENT, 5091 ms]
39.41/11.94	(4) LLVM Symbolic Execution Graph
39.41/11.94	(5) SymbolicExecutionGraphToSCCProof [SOUND, 1 ms]
39.41/11.94	(6) AND
39.41/11.94	    (7) LLVM Symbolic Execution SCC
39.41/11.94	        (8) SCC2IRS [SOUND, 117 ms]
39.41/11.94	        (9) IntTRS
39.41/11.94	        (10) IRS2T2 [EQUIVALENT, 0 ms]
39.41/11.94	        (11) T2IntSys
39.41/11.94	        (12) T2 [EQUIVALENT, 933 ms]
39.41/11.94	        (13) YES
39.41/11.94	    (14) LLVM Symbolic Execution SCC
39.41/11.94	        (15) SCC2IRS [SOUND, 71 ms]
39.41/11.94	        (16) IntTRS
39.41/11.94	        (17) IRS2T2 [EQUIVALENT, 0 ms]
39.41/11.94	        (18) T2IntSys
39.41/11.94	        (19) T2 [EQUIVALENT, 1133 ms]
39.41/11.94	        (20) YES
39.41/11.94	    (21) LLVM Symbolic Execution SCC
39.41/11.94	        (22) SCC2IRS [SOUND, 60 ms]
39.41/11.94	        (23) IntTRS
39.41/11.94	        (24) IntTRSCompressionProof [EQUIVALENT, 0 ms]
39.41/11.94	        (25) IntTRS
39.41/11.94	        (26) RankingReductionPairProof [EQUIVALENT, 14 ms]
39.41/11.94	        (27) YES
39.41/11.94	
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(0)
39.41/11.94	Obligation:
39.41/11.94	c file /export/starexec/sandbox/benchmark/theBenchmark.c
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(1) CToLLVMProof (EQUIVALENT)
39.41/11.94	Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM.
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(2)
39.41/11.94	Obligation:
39.41/11.94	LLVM Problem
39.41/11.94	
39.41/11.94	Aliases:
39.41/11.94	
39.41/11.94	Data layout:
39.41/11.94	
39.41/11.94	"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
39.41/11.94	
39.41/11.94	Machine:
39.41/11.94	
39.41/11.94	"x86_64-pc-linux-gnu"
39.41/11.94	
39.41/11.94	Type definitions:
39.41/11.94	
39.41/11.94	Global variables:
39.41/11.94	
39.41/11.94	Function declarations and definitions:
39.41/11.94	
39.41/11.94	*BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc
39.41/11.94		0:
39.41/11.94			%1 = alloca i32, align 4
39.41/11.94			%i = alloca *i32, align 8
39.41/11.94			%j = alloca *i32, align 8
39.41/11.94			%n = alloca *i32, align 8
39.41/11.94			store 0, %1
39.41/11.94			%2 = alloca i8, numElementsLit: 4
39.41/11.94			%3 = bitcast *i8 %2 to *i32
39.41/11.94			store %3, %i
39.41/11.94			%4 = alloca i8, numElementsLit: 4
39.41/11.94			%5 = bitcast *i8 %4 to *i32
39.41/11.94			store %5, %j
39.41/11.94			%6 = alloca i8, numElementsLit: 4
39.41/11.94			%7 = bitcast *i8 %6 to *i32
39.41/11.94			store %7, %n
39.41/11.94			br %8
39.41/11.94		8:
39.41/11.94			%9 = load %i
39.41/11.94			%10 = load %9
39.41/11.94			%11 = load %n
39.41/11.94			%12 = load %11
39.41/11.94			%13 = icmp slt %10 %12
39.41/11.94			br %13, %14, %32
39.41/11.94		14:
39.41/11.94			%15 = load %j
39.41/11.94			store 0, %15
39.41/11.94			br %16
39.41/11.94		16:
39.41/11.94			%17 = load %j
39.41/11.94			%18 = load %17
39.41/11.94			%19 = load %i
39.41/11.94			%20 = load %19
39.41/11.94			%21 = icmp sle %18 %20
39.41/11.94			br %21, %22, %27
39.41/11.94		22:
39.41/11.94			%23 = load %j
39.41/11.94			%24 = load %23
39.41/11.94			%25 = add %24 1
39.41/11.94			%26 = load %j
39.41/11.94			store %25, %26
39.41/11.94			br %16
39.41/11.94		27:
39.41/11.94			%28 = load %i
39.41/11.94			%29 = load %28
39.41/11.94			%30 = add %29 1
39.41/11.94			%31 = load %i
39.41/11.94			store %30, %31
39.41/11.94			br %8
39.41/11.94		32:
39.41/11.94			ret 0
39.41/11.94	
39.41/11.94	
39.41/11.94	Analyze Termination of all function calls matching the pattern:
39.41/11.94	main()
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(3) LLVMToTerminationGraphProof (EQUIVALENT)
39.41/11.94	Constructed symbolic execution graph for LLVM program and proved memory safety.
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(4)
39.41/11.94	Obligation:
39.41/11.94	SE Graph
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(5) SymbolicExecutionGraphToSCCProof (SOUND)
39.41/11.94	Splitted symbolic execution graph to 3 SCCs.
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(6)
39.41/11.94	Complex Obligation (AND)
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(7)
39.41/11.94	Obligation:
39.41/11.94	SCC
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(8) SCC2IRS (SOUND)
39.41/11.94	Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 
39.41/11.94	Generated rules. Obtained 47 rulesP rules:
39.41/11.94	f_464(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) -> f_466(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_466(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) -> f_468(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_468(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) -> f_470(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_470(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) -> f_472(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) :|: v695 < v692 && 2 <= v692
39.41/11.94	f_472(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) -> f_475(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_475(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) -> f_478(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_478(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) -> f_481(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_481(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) -> f_484(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_484(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) -> f_486(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_486(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) -> f_487(v684, v685, v686, v687, v688, v689, v690, v695, v692, 1, v691, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_487(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, v1027, 0, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) -> f_489(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, v1027, 0, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_489(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, v1027, 0, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) -> f_491(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_491(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) -> f_493(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_493(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) -> f_495(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_495(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) -> f_497(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_497(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) -> f_499(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_499(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 3, 7, 2, 4, 8) -> f_500(v1017, v1018, v1019, v1020, v1021, v1022, v1023, v1024, v1025, 1, 0, v1027, v1029, v1030, v1031, v1032, v1033, v1034, v1035, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_500(v1099, v1100, v1101, v1102, v1103, v1104, v1105, v1106, v1107, 1, v1109, v1110, v1111, v1112, v1113, v1114, v1115, v1116, v1117, 0, 3, 7, 2, 4, 8) -> f_517(v1099, v1100, v1101, v1102, v1103, v1104, v1105, v1106, v1107, 1, v1109, v1110, v1110, v1106, v1111, v1112, v1113, v1114, v1115, v1116, v1117, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_517(v1201, v1202, v1203, v1204, v1205, v1206, v1207, v1208, v1209, 1, v1211, v1212, v1213, v1214, v1215, v1216, v1217, v1218, v1219, v1220, v1221, 0, 3, 7, 2, 4, 8) -> f_540(v1201, v1202, v1203, v1204, v1205, v1206, v1207, v1208, v1209, 1, v1211, v1212, v1213, v1214, v1215, v1216, v1217, v1218, v1219, v1220, v1221, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_540(v1326, v1327, v1328, v1329, v1330, v1331, v1332, v1333, v1334, 1, v1336, v1337, v1338, v1339, v1340, v1341, v1342, v1343, v1344, v1345, v1346, 0, 3, 7, 2, 4, 8) -> f_563(v1326, v1327, v1328, v1329, v1330, v1331, v1332, v1333, v1334, 1, v1336, v1337, v1338, v1339, v1340, v1341, v1342, v1343, v1344, v1345, v1346, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_563(v1451, v1452, v1453, v1454, v1455, v1456, v1457, v1458, v1459, 1, v1461, v1462, v1463, v1464, v1465, v1466, v1467, v1468, v1469, v1470, v1471, 0, 3, 7, 2, 4, 8) -> f_586(v1451, v1452, v1453, v1454, v1455, v1456, v1457, v1458, v1459, 1, v1461, v1462, v1463, v1464, v1465, v1466, v1467, v1468, v1469, v1470, v1471, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_586(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1588, v1589, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) -> f_588(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1588, v1589, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_588(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1588, v1589, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) -> f_590(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1589, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_590(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1589, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) -> f_592(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) :|: v1617 = 1 + v1586 && 1 <= v1617
39.41/11.94	f_592(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) -> f_594(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_594(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) -> f_596(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_596(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) -> f_598(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_598(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 2, 4, 8) -> f_599(v1576, v1577, v1578, v1579, v1580, v1581, v1582, v1583, v1584, 1, v1586, v1587, v1617, v1590, v1591, v1592, v1593, v1594, v1595, v1596, 0, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_599(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1666, v1667, v1668, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) -> f_600(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1666, v1667, v1668, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_600(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1666, v1667, v1668, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) -> f_601(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_601(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) -> f_602(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_602(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) -> f_603(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_603(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) -> f_604(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 2, 4, 8) :|: v1668 <= v1663 && 1 <= v1663 && 0 <= v1667 && 2 <= v1664
39.41/11.94	f_603(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) -> f_605(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) :|: v1663 < v1668 && v1666 = v1663
39.41/11.94	f_604(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 2, 4, 8) -> f_606(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_606(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 2, 4, 8) -> f_608(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_608(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 2, 4, 8) -> f_586(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1666, v1668, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_605(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, v1667, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 0, 3, 7, 4, 8) -> f_607(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1667, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_607(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1667, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) -> f_609(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1667, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_609(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1667, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) -> f_610(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1667, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_610(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1667, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) -> f_611(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_611(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) -> f_612(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: v1668 = 1 + v1663
39.41/11.94	f_612(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) -> f_613(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_613(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) -> f_614(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_614(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) -> f_615(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_615(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) -> f_462(v1656, v1657, v1658, v1659, v1660, v1661, v1662, v1663, v1664, 1, v1668, 0, v1669, v1670, v1671, v1672, v1673, v1674, v1675, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_462(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) -> f_464(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, 0, v696, v697, v698, v699, v700, v701, v702, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	Combined rules. Obtained 2 rulesP rules:
39.41/11.94	f_603(v1656:0, v1657:0, v1658:0, v1659:0, v1660:0, v1661:0, v1662:0, v1663:0, v1664:0, 1, 1 + v1663:0, v1667:0, v1663:0, v1669:0, v1670:0, v1671:0, v1672:0, v1673:0, v1674:0, v1675:0, 0, 3, 7, 4, 8) -> f_603(v1656:0, v1657:0, v1658:0, v1659:0, v1660:0, v1661:0, v1662:0, 1 + v1663:0, v1664:0, 1, 1, v1663:0, 0, v1669:0, v1670:0, v1671:0, v1672:0, v1673:0, v1674:0, v1675:0, 0, 3, 7, 4, 8) :|: v1664:0 > 1 && v1663:0 < 1 + v1663:0 && v1664:0 > 1 + v1663:0
39.41/11.94	f_603(v1656:0, v1657:0, v1658:0, v1659:0, v1660:0, v1661:0, v1662:0, v1663:0, v1664:0, 1, v1668:0, v1667:0, v1666:0, v1669:0, v1670:0, v1671:0, v1672:0, v1673:0, v1674:0, v1675:0, 0, 3, 7, 4, 8) -> f_603(v1656:0, v1657:0, v1658:0, v1659:0, v1660:0, v1661:0, v1662:0, v1663:0, v1664:0, 1, 1 + v1668:0, v1667:0, v1668:0, v1669:0, v1670:0, v1671:0, v1672:0, v1673:0, v1674:0, v1675:0, 0, 3, 7, 4, 8) :|: v1668:0 > -1 && v1663:0 > 0 && v1668:0 <= v1663:0 && v1664:0 > 1 && v1667:0 > -1
39.41/11.94	Filtered unneeded arguments:
39.41/11.94	   f_603(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25) -> f_603(x8, x9, x11, x12, x13)
39.41/11.94	Removed division, modulo operations, cleaned up constraints. Obtained 2 rules.P rules:
39.41/11.94	f_603(v1663:0, v1664:0, sum~cons_1~v1663:0, v1667:0, v1663:01) -> f_603(1 + v1663:0, v1664:0, 1, v1663:0, 0) :|: v1663:0 < 1 + v1663:0 && v1664:0 > 1 + v1663:0 && v1664:0 > 1 && sum~cons_1~v1663:0 = 1 + v1663:0 && v1663:0 = v1663:01
39.41/11.94	f_603(v1663:0, v1664:0, v1668:0, v1667:0, v1666:0) -> f_603(v1663:0, v1664:0, 1 + v1668:0, v1667:0, v1668:0) :|: v1663:0 > 0 && v1668:0 > -1 && v1668:0 <= v1663:0 && v1667:0 > -1 && v1664:0 > 1
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(9)
39.41/11.94	Obligation:
39.41/11.94	Rules:
39.41/11.94	f_603(v1663:0, v1664:0, sum~cons_1~v1663:0, v1667:0, v1663:01) -> f_603(1 + v1663:0, v1664:0, 1, v1663:0, 0) :|: v1663:0 < 1 + v1663:0 && v1664:0 > 1 + v1663:0 && v1664:0 > 1 && sum~cons_1~v1663:0 = 1 + v1663:0 && v1663:0 = v1663:01
39.41/11.94	f_603(x, x1, x2, x3, x4) -> f_603(x, x1, 1 + x2, x3, x2) :|: x > 0 && x2 > -1 && x2 <= x && x3 > -1 && x1 > 1
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(10) IRS2T2 (EQUIVALENT)
39.41/11.94	Transformed input IRS into an integer transition system.Used the following mapping from defined symbols to location IDs:
39.41/11.94	
39.41/11.94	   (f_603_5,1)
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(11)
39.41/11.94	Obligation:
39.41/11.94	START: 0;
39.41/11.94	
39.41/11.94	FROM: 0;
39.41/11.94	TO: 1;
39.41/11.94	
39.41/11.94	FROM: 1;
39.41/11.94	oldX0 := x0;
39.41/11.94	oldX1 := x1;
39.41/11.94	oldX2 := x2;
39.41/11.94	oldX3 := x3;
39.41/11.94	oldX4 := x4;
39.41/11.94	assume(oldX0 < 1 + oldX0 && oldX1 > 1 + oldX0 && oldX1 > 1 && oldX2 = 1 + oldX0 && oldX0 = oldX4);
39.41/11.94	x0 := 1 + oldX0;
39.41/11.94	x1 := oldX1;
39.41/11.94	x2 := 1;
39.41/11.94	x3 := oldX0;
39.41/11.94	x4 := 0;
39.41/11.94	TO: 1;
39.41/11.94	
39.41/11.94	FROM: 1;
39.41/11.94	oldX0 := x0;
39.41/11.94	oldX1 := x1;
39.41/11.94	oldX2 := x2;
39.41/11.94	oldX3 := x3;
39.41/11.94	oldX4 := x4;
39.41/11.94	assume(oldX0 > 0 && oldX2 > -1 && oldX2 <= oldX0 && oldX3 > -1 && oldX1 > 1);
39.41/11.94	x0 := oldX0;
39.41/11.94	x1 := oldX1;
39.41/11.94	x2 := 1 + oldX2;
39.41/11.94	x3 := oldX3;
39.41/11.94	x4 := oldX2;
39.41/11.94	TO: 1;
39.41/11.94	
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(12) T2 (EQUIVALENT)
39.41/11.94	Initially, performed program simplifications using lexicographic rank functions:
39.41/11.94	 * Removed transitions 1, 4, 5 using the following rank functions:
39.41/11.94	    - Rank function 1:
39.41/11.94	      RF for loc. 5: -x0+x1
39.41/11.94	      RF for loc. 6: -x0+x1
39.41/11.94	      Bound for (chained) transitions 4: 2
39.41/11.94	    - Rank function 2:
39.41/11.94	      RF for loc. 5: 2*x0-2*x2
39.41/11.94	      RF for loc. 6: -1+2*x0-2*x2
39.41/11.94	      Bound for (chained) transitions 5: -1
39.41/11.94	    - Rank function 3:
39.41/11.94	      RF for loc. 5: 0
39.41/11.94	      RF for loc. 6: -1
39.41/11.94	      Bound for (chained) transitions 1: 0
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(13)
39.41/11.94	YES
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(14)
39.41/11.94	Obligation:
39.41/11.94	SCC
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(15) SCC2IRS (SOUND)
39.41/11.94	Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 
39.41/11.94	Generated rules. Obtained 14 rulesP rules:
39.41/11.94	f_421(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v694, v695, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) -> f_424(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_424(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) -> f_427(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_427(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) -> f_430(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_430(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) -> f_433(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: v695 <= v691 && 1 <= v691 && 2 <= v692
39.41/11.94	f_433(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_437(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_437(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_440(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_440(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_443(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_443(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v694, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_446(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_446(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_449(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: v796 = 1 + v695 && 2 <= v796
39.41/11.94	f_449(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_453(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: 0 = 0
39.41/11.94	f_453(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_457(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_457(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_461(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) :|: TRUE
39.41/11.94	f_461(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 2, 4, 8) -> f_418(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v695, v796, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_418(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v694, v695, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) -> f_421(v684, v685, v686, v687, v688, v689, v690, v691, v692, 1, v694, v695, v696, v697, v698, v699, v700, v701, v702, 0, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	Combined rules. Obtained 1 rulesP rules:
39.41/11.94	f_421(v684:0, v685:0, v686:0, v687:0, v688:0, v689:0, v690:0, v691:0, v692:0, 1, v694:0, v695:0, v696:0, v697:0, v698:0, v699:0, v700:0, v701:0, v702:0, 0, 3, 7, 4, 8) -> f_421(v684:0, v685:0, v686:0, v687:0, v688:0, v689:0, v690:0, v691:0, v692:0, 1, v695:0, 1 + v695:0, v696:0, v697:0, v698:0, v699:0, v700:0, v701:0, v702:0, 0, 3, 7, 4, 8) :|: v691:0 > 0 && v695:0 <= v691:0 && v695:0 > 0 && v692:0 > 1
39.41/11.94	Filtered unneeded arguments:
39.41/11.94	   f_421(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24) -> f_421(x8, x9, x12)
39.41/11.94	Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules:
39.41/11.94	f_421(v691:0, v692:0, v695:0) -> f_421(v691:0, v692:0, 1 + v695:0) :|: v695:0 <= v691:0 && v691:0 > 0 && v692:0 > 1 && v695:0 > 0
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(16)
39.41/11.94	Obligation:
39.41/11.94	Rules:
39.41/11.94	f_421(v691:0, v692:0, v695:0) -> f_421(v691:0, v692:0, 1 + v695:0) :|: v695:0 <= v691:0 && v691:0 > 0 && v692:0 > 1 && v695:0 > 0
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(17) IRS2T2 (EQUIVALENT)
39.41/11.94	Transformed input IRS into an integer transition system.Used the following mapping from defined symbols to location IDs:
39.41/11.94	
39.41/11.94	   (f_421_3,1)
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(18)
39.41/11.94	Obligation:
39.41/11.94	START: 0;
39.41/11.94	
39.41/11.94	FROM: 0;
39.41/11.94	TO: 1;
39.41/11.94	
39.41/11.94	FROM: 1;
39.41/11.94	oldX0 := x0;
39.41/11.94	oldX1 := x1;
39.41/11.94	oldX2 := x2;
39.41/11.94	assume(oldX2 <= oldX0 && oldX0 > 0 && oldX1 > 1 && oldX2 > 0);
39.41/11.94	x0 := oldX0;
39.41/11.94	x1 := oldX1;
39.41/11.94	x2 := 1 + oldX2;
39.41/11.94	TO: 1;
39.41/11.94	
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(19) T2 (EQUIVALENT)
39.41/11.94	Initially, performed program simplifications using lexicographic rank functions:
39.41/11.94	 * Removed transitions 1, 3, 4 using the following rank functions:
39.41/11.94	    - Rank function 1:
39.41/11.94	      RF for loc. 5: 1+2*x0-2*x2
39.41/11.94	      RF for loc. 6: 2*x0-2*x2
39.41/11.94	      Bound for (chained) transitions 3: 0
39.41/11.94	      Bound for (chained) transitions 4: 0
39.41/11.94	    - Rank function 2:
39.41/11.94	      RF for loc. 5: 0
39.41/11.94	      RF for loc. 6: -1
39.41/11.94	      Bound for (chained) transitions 1: 0
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(20)
39.41/11.94	YES
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(21)
39.41/11.94	Obligation:
39.41/11.94	SCC
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(22) SCC2IRS (SOUND)
39.41/11.94	Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 
39.41/11.94	Generated rules. Obtained 24 rulesP rules:
39.41/11.94	f_183(v1, v3, v5, v7, v9, v12, v15, v18, v20, 1, 0, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_185(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_185(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_187(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_187(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_189(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_189(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_192(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: v22 < v20
39.41/11.94	f_192(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_196(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_196(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_200(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_200(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_204(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_204(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_207(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_207(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_210(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_210(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_213(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_213(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_216(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_216(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_219(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_219(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_221(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_221(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_224(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: v22 < 0 && 2 + v18 <= 0
39.41/11.94	f_224(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_227(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0
39.41/11.94	f_227(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_230(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: TRUE
39.41/11.94	f_230(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_234(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0
39.41/11.94	f_234(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v18, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_238(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_238(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_242(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: v77 = 1 + v22 && v77 <= 0
39.41/11.94	f_242(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_246(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	f_246(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_250(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_250(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_254(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_254(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_181(v1, v3, v5, v7, v9, v12, v15, v22, v20, 1, 0, v77, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE
39.41/11.94	f_181(v1, v3, v5, v7, v9, v12, v15, v18, v20, 1, 0, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_183(v1, v3, v5, v7, v9, v12, v15, v18, v20, 1, 0, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0
39.41/11.94	Combined rules. Obtained 1 rulesP rules:
39.41/11.94	f_183(v1:0, v3:0, v5:0, v7:0, v9:0, v12:0, v15:0, v18:0, v20:0, 1, 0, v22:0, v2:0, v4:0, v6:0, v8:0, v10:0, v13:0, v16:0, 3, 7, 4, 8) -> f_183(v1:0, v3:0, v5:0, v7:0, v9:0, v12:0, v15:0, v22:0, v20:0, 1, 0, 1 + v22:0, v2:0, v4:0, v6:0, v8:0, v10:0, v13:0, v16:0, 3, 7, 4, 8) :|: v22:0 < v20:0 && v18:0 < -1 && v22:0 < 0
39.41/11.94	Filtered unneeded arguments:
39.41/11.94	   f_183(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23) -> f_183(x8, x9, x12)
39.41/11.94	Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules:
39.41/11.94	f_183(v18:0, v20:0, v22:0) -> f_183(v22:0, v20:0, 1 + v22:0) :|: v18:0 < -1 && v22:0 < 0 && v22:0 < v20:0
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(23)
39.41/11.94	Obligation:
39.41/11.94	Rules:
39.41/11.94	f_183(v18:0, v20:0, v22:0) -> f_183(v22:0, v20:0, 1 + v22:0) :|: v18:0 < -1 && v22:0 < 0 && v22:0 < v20:0
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(24) IntTRSCompressionProof (EQUIVALENT)
39.41/11.94	Compressed rules.
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(25)
39.41/11.94	Obligation:
39.41/11.94	Rules:
39.41/11.94	f_183(v18:0:0, v20:0:0, v22:0:0) -> f_183(v22:0:0, v20:0:0, 1 + v22:0:0) :|: v18:0:0 < -1 && v22:0:0 < 0 && v22:0:0 < v20:0:0
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(26) RankingReductionPairProof (EQUIVALENT)
39.41/11.94	Interpretation:
39.41/11.94	[ f_183 ] = -1*f_183_3
39.41/11.94	
39.41/11.94	The following rules are decreasing:
39.41/11.94	f_183(v18:0:0, v20:0:0, v22:0:0) -> f_183(v22:0:0, v20:0:0, 1 + v22:0:0) :|: v18:0:0 < -1 && v22:0:0 < 0 && v22:0:0 < v20:0:0
39.41/11.94	
39.41/11.94	The following rules are bounded:
39.41/11.94	f_183(v18:0:0, v20:0:0, v22:0:0) -> f_183(v22:0:0, v20:0:0, 1 + v22:0:0) :|: v18:0:0 < -1 && v22:0:0 < 0 && v22:0:0 < v20:0:0
39.41/11.94	
39.41/11.94	
39.41/11.94	----------------------------------------
39.41/11.94	
39.41/11.94	(27)
39.41/11.94	YES
39.59/12.04	EOF