48.77/13.28 YES 48.77/13.31 proof of /export/starexec/sandbox2/benchmark/theBenchmark.c 48.77/13.31 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 48.77/13.31 48.77/13.31 48.77/13.31 Termination of the given C Problem could be proven: 48.77/13.31 48.77/13.31 (0) C Problem 48.77/13.31 (1) CToLLVMProof [EQUIVALENT, 175 ms] 48.77/13.31 (2) LLVM problem 48.77/13.31 (3) LLVMToTerminationGraphProof [EQUIVALENT, 3772 ms] 48.77/13.31 (4) LLVM Symbolic Execution Graph 48.77/13.31 (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] 48.77/13.31 (6) AND 48.77/13.31 (7) LLVM Symbolic Execution SCC 48.77/13.31 (8) SCC2IRS [SOUND, 37 ms] 48.77/13.31 (9) IntTRS 48.77/13.31 (10) IRS2T2 [EQUIVALENT, 0 ms] 48.77/13.31 (11) T2IntSys 48.77/13.31 (12) T2 [EQUIVALENT, 1064 ms] 48.77/13.31 (13) YES 48.77/13.31 (14) LLVM Symbolic Execution SCC 48.77/13.31 (15) SCC2IRS [SOUND, 23 ms] 48.77/13.31 (16) IntTRS 48.77/13.31 (17) IntTRSCompressionProof [EQUIVALENT, 0 ms] 48.77/13.31 (18) IntTRS 48.77/13.31 (19) RankingReductionPairProof [EQUIVALENT, 0 ms] 48.77/13.31 (20) YES 48.77/13.31 (21) LLVM Symbolic Execution SCC 48.77/13.31 (22) SCC2IRS [SOUND, 20 ms] 48.77/13.31 (23) IntTRS 48.77/13.31 (24) IRS2T2 [EQUIVALENT, 0 ms] 48.77/13.31 (25) T2IntSys 48.77/13.31 (26) T2 [EQUIVALENT, 2 ms] 48.77/13.31 (27) YES 48.77/13.31 48.77/13.31 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (0) 48.77/13.31 Obligation: 48.77/13.31 c file /export/starexec/sandbox2/benchmark/theBenchmark.c 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (1) CToLLVMProof (EQUIVALENT) 48.77/13.31 Compiled c-file /export/starexec/sandbox2/benchmark/theBenchmark.c to LLVM. 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (2) 48.77/13.31 Obligation: 48.77/13.31 LLVM Problem 48.77/13.31 48.77/13.31 Aliases: 48.77/13.31 48.77/13.31 Data layout: 48.77/13.31 48.77/13.31 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 48.77/13.31 48.77/13.31 Machine: 48.77/13.31 48.77/13.31 "x86_64-pc-linux-gnu" 48.77/13.31 48.77/13.31 Type definitions: 48.77/13.31 48.77/13.31 Global variables: 48.77/13.31 48.77/13.31 Function declarations and definitions: 48.77/13.31 48.77/13.31 *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 48.77/13.31 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 48.77/13.31 0: 48.77/13.31 %1 = alloca i32, align 4 48.77/13.31 %p = alloca i32, align 4 48.77/13.31 %q = alloca i32, align 4 48.77/13.31 store 0, %1 48.77/13.31 %2 = call i32 @__VERIFIER_nondet_int() 48.77/13.31 store %2, %q 48.77/13.31 %3 = call i32 @__VERIFIER_nondet_int() 48.77/13.31 store %3, %p 48.77/13.31 br %4 48.77/13.31 4: 48.77/13.31 %5 = load %q 48.77/13.31 %6 = icmp sgt %5 0 48.77/13.31 br %6, %7, %14 48.77/13.31 7: 48.77/13.31 %8 = load %p 48.77/13.31 %9 = icmp sgt %8 0 48.77/13.31 br %9, %10, %14 48.77/13.31 10: 48.77/13.31 %11 = load %p 48.77/13.31 %12 = load %q 48.77/13.31 %13 = icmp ne %11 %12 48.77/13.31 br %14 48.77/13.31 14: 48.77/13.31 %15 = phi [0, %7], [0, %4], [%13, %10] 48.77/13.31 br %15, %16, %34 48.77/13.31 16: 48.77/13.31 %17 = load %q 48.77/13.31 %18 = load %p 48.77/13.31 %19 = icmp slt %17 %18 48.77/13.31 br %19, %20, %24 48.77/13.31 20: 48.77/13.31 %21 = load %q 48.77/13.31 %22 = sub %21 1 48.77/13.31 store %22, %q 48.77/13.31 %23 = call i32 @__VERIFIER_nondet_int() 48.77/13.31 store %23, %p 48.77/13.31 br %33 48.77/13.31 24: 48.77/13.31 %25 = load %p 48.77/13.31 %26 = load %q 48.77/13.31 %27 = icmp slt %25 %26 48.77/13.31 br %27, %28, %32 48.77/13.31 28: 48.77/13.31 %29 = load %p 48.77/13.31 %30 = sub %29 1 48.77/13.31 store %30, %p 48.77/13.31 %31 = call i32 @__VERIFIER_nondet_int() 48.77/13.31 store %31, %q 48.77/13.31 br %32 48.77/13.31 32: 48.77/13.31 br %33 48.77/13.31 33: 48.77/13.31 br %4 48.77/13.31 34: 48.77/13.31 ret 0 48.77/13.31 48.77/13.31 48.77/13.31 Analyze Termination of all function calls matching the pattern: 48.77/13.31 main() 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (3) LLVMToTerminationGraphProof (EQUIVALENT) 48.77/13.31 Constructed symbolic execution graph for LLVM program and proved memory safety. 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (4) 48.77/13.31 Obligation: 48.77/13.31 SE Graph 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (5) SymbolicExecutionGraphToSCCProof (SOUND) 48.77/13.31 Splitted symbolic execution graph to 3 SCCs. 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (6) 48.77/13.31 Complex Obligation (AND) 48.77/13.31 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (7) 48.77/13.31 Obligation: 48.77/13.31 SCC 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (8) SCC2IRS (SOUND) 48.77/13.31 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 48.77/13.31 Generated rules. Obtained 69 rulesP rules: 48.77/13.31 f_775(v6499, v6500, v6501, v6502, v6503, v6504, 1, v6506, v6507, v6508, v6509, v6510, v6511, v6512, v6513, v6514, v6515, 0, 3, 4, 2) -> f_777(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6506, v6504, v6507, v6508, v6509, v6510, v6512, v6513, v6514, v6515, 0, 3, 4, 2) :|: 0 = 0 48.77/13.31 f_777(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6506, v6504, v6507, v6508, v6509, v6510, v6512, v6513, v6514, v6515, 0, 3, 4, 2) -> f_780(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6506, v6504, v6507, v6508, v6509, v6510, v6512, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 < v6511 && 2 <= v6504 && 2 <= v6510 && 3 <= v6506 && 3 <= v6509 && 4 <= v6507 && 5 <= v6502 && 5 <= v6508 && 4 <= v6503 48.77/13.31 f_780(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6506, v6504, v6507, v6508, v6509, v6510, v6512, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_784(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6506, v6504, v6507, v6508, v6509, v6510, v6512, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_784(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6506, v6504, v6507, v6508, v6509, v6510, v6512, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_788(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6506, v6504, v6507, v6508, v6509, v6510, v6512, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_788(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6506, v6504, v6507, v6508, v6509, v6510, v6512, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_792(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6504, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_792(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6504, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_796(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6504, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 < v6512 48.77/13.31 f_796(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6504, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_800(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6504, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_800(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6504, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_804(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6504, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_804(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6504, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_808(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_808(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_812(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_812(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_814(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: v6512 != v6511 48.77/13.31 f_814(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_817(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_817(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_820(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_820(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_823(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_823(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6506, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_825(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_825(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6506, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_826(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_826(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_827(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: v6511 < v6512 && 2 <= v6512 48.77/13.31 f_826(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_828(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 6, 5, 4, 2) :|: v6512 <= v6511 && 2 <= v6511 && 3 <= v6504 && 3 <= v6510 && 4 <= v6509 && 5 <= v6507 && 6 <= v6502 && 6 <= v6508 && 5 <= v6503 48.77/13.31 f_827(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_829(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_829(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_831(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_831(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 5, 4, 2) -> f_832(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6504, v6511, v6512, v6507, v6508, v6509, v6510, v6513, v6514, v6515, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_832(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7457, v7458, v7459, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) -> f_834(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7458, v7459, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_834(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7458, v7459, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) -> f_836(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7459, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) :|: 1 + v7499 = v7454 && 0 <= v7499 48.77/13.31 f_836(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7459, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) -> f_838(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7459, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_838(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7459, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) -> f_840(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7501, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_840(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7501, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) -> f_842(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7501, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_842(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7501, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) -> f_844(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7501, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_844(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7499, v7501, v7460, v7461, v7462, v7463, v7464, v7465, v7466, 0, 3, 5, 4, 2) -> f_773(v7449, v7450, v7451, v7452, v7453, v7454, 1, v7456, v7460, v7461, v7462, v7463, v7499, v7501, v7464, v7465, v7466, 0, 3, 4, 2) :|: TRUE 48.77/13.31 f_773(v6499, v6500, v6501, v6502, v6503, v6504, 1, v6506, v6507, v6508, v6509, v6510, v6511, v6512, v6513, v6514, v6515, 0, 3, 4, 2) -> f_775(v6499, v6500, v6501, v6502, v6503, v6504, 1, v6506, v6507, v6508, v6509, v6510, v6511, v6512, v6513, v6514, v6515, 0, 3, 4, 2) :|: TRUE 48.77/13.31 f_828(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 0, 3, 6, 5, 4, 2) -> f_830(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, 0, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 3, 6, 5, 4, 2) :|: 0 = 0 48.77/13.31 f_830(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, 0, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 3, 6, 5, 4, 2) -> f_833(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, 0, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 3, 6, 5, 4, 2) :|: TRUE 48.77/13.31 f_833(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, 0, v6507, v6508, v6509, v6510, v6504, v6513, v6514, v6515, 3, 6, 5, 4, 2) -> f_887(v6499, v6500, v6501, v6502, v6503, v6511, 1, v6512, 0, v6507, v6508, v6509, v6510, v6504, v6511, v6512, v6513, v6514, v6515, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_887(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8545, v8546, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_888(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8546, v8545, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_888(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8546, v8545, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_889(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8545, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_889(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8545, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_890(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8545, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_890(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8545, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_891(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8545, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_891(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8545, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_892(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_892(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8547, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_893(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: 1 + v8577 = v8543 && 0 <= v8577 48.77/13.31 f_893(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_894(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_894(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8548, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_895(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8579, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_895(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8579, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_896(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8579, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_896(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8579, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_897(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8579, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_897(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8579, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_898(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8579, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_898(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8577, v8579, v8549, v8550, v8551, v8552, v8553, v8554, 3, 4, 5, 2) -> f_851(v8536, v8537, v8538, v8539, v8540, v8541, 1, v8543, 0, v8549, v8550, v8551, v8577, v8579, v8552, v8553, v8554, 3, 4, 2) :|: TRUE 48.77/13.31 f_851(v7628, v7629, v7630, v7631, v7632, v7633, 1, v7635, 0, v7637, v7638, v7639, v7640, v7641, v7642, v7643, v7644, 3, 4, 2) -> f_852(v7628, v7629, v7630, v7631, v7632, v7633, 1, v7635, 0, v7637, v7638, v7639, v7640, v7641, v7642, v7643, v7644, 3, 4, 2) :|: TRUE 48.77/13.31 f_852(v7628, v7629, v7630, v7631, v7632, v7633, 1, v7635, 0, v7637, v7638, v7639, v7640, v7641, v7642, v7643, v7644, 3, 4, 2) -> f_853(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7635, v7633, 0, v7637, v7638, v7639, v7640, v7642, v7643, v7644, 3, 4, 2) :|: 0 = 0 48.77/13.31 f_853(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7635, v7633, 0, v7637, v7638, v7639, v7640, v7642, v7643, v7644, 3, 4, 2) -> f_854(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7635, v7633, 0, v7637, v7638, v7639, v7640, v7642, v7643, v7644, 3, 4, 2) :|: 0 < v7641 48.77/13.31 f_854(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7635, v7633, 0, v7637, v7638, v7639, v7640, v7642, v7643, v7644, 3, 4, 2) -> f_856(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7635, v7633, 0, v7637, v7638, v7639, v7640, v7642, v7643, v7644, 3, 4, 2) :|: 0 = 0 48.77/13.31 f_856(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7635, v7633, 0, v7637, v7638, v7639, v7640, v7642, v7643, v7644, 3, 4, 2) -> f_858(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7635, v7633, 0, v7637, v7638, v7639, v7640, v7642, v7643, v7644, 3, 4, 2) :|: TRUE 48.77/13.31 f_858(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7635, v7633, 0, v7637, v7638, v7639, v7640, v7642, v7643, v7644, 3, 4, 2) -> f_860(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, v7633, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 2) :|: 0 = 0 48.77/13.31 f_860(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, v7633, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 2) -> f_862(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, v7633, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 < v7640 && 2 <= v7635 && 2 <= v7639 && 3 <= v7633 && 3 <= v7638 && 4 <= v7637 && 5 <= v7632 && 4 <= v7631 48.77/13.31 f_862(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, v7633, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_864(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, v7633, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_864(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, v7633, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_866(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, v7633, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_866(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, v7633, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_868(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_868(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_870(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_870(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_871(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: v7640 != v7641 48.77/13.31 f_871(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_873(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_873(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_875(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_875(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_877(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_877(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7633, v7635, 0, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) -> f_879(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, 0, v7637, v7638, v7639, v7633, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_879(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7635, 0, v7637, v7638, v7639, v7633, v7642, v7643, v7644, 3, 4, 5, 2) -> f_880(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_880(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) -> f_881(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 5, 6, 4, 2) :|: v7641 < v7640 && 2 <= v7640 && 3 <= v7635 && 3 <= v7639 && 4 <= v7633 && 4 <= v7638 && 5 <= v7637 && 6 <= v7632 && 5 <= v7631 48.77/13.31 f_880(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) -> f_882(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) :|: v7640 <= v7641 && 2 <= v7641 48.77/13.31 f_881(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 5, 6, 4, 2) -> f_883(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 0, 3, 5, 6, 4, 2) :|: 0 = 0 48.77/13.31 f_883(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 0, 3, 5, 6, 4, 2) -> f_885(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 0, 3, 5, 6, 4, 2) :|: TRUE 48.77/13.31 f_885(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 0, 3, 5, 6, 4, 2) -> f_832(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, v7637, v7638, v7639, v7635, v7633, v7640, v7641, v7642, v7643, v7644, 0, 3, 5, 4, 2) :|: TRUE 48.77/13.31 f_882(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) -> f_884(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) :|: 0 = 0 48.77/13.31 f_884(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) -> f_886(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) :|: TRUE 48.77/13.31 f_886(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7637, v7638, v7639, v7635, v7633, v7642, v7643, v7644, 3, 4, 5, 2) -> f_887(v7628, v7629, v7630, v7631, v7632, v7641, 1, v7640, 0, v7635, v7633, v7640, v7641, v7637, v7638, v7639, v7642, v7643, v7644, 3, 4, 5, 2) :|: TRUE 48.77/13.31 Combined rules. Obtained 6 rulesP rules: 48.77/13.31 f_880(v7628:0, v7629:0, v7630:0, v7631:0, v7632:0, 1 + v7499:0, 1, v7640:0, 0, v7637:0, v7638:0, v7639:0, v7635:0, v7633:0, v7642:0, v7643:0, v7644:0, 3, 4, 5, 2) -> f_775(v7628:0, v7629:0, v7630:0, v7631:0, v7632:0, 1 + v7499:0, 1, v7640:0, v7635:0, v7633:0, v7640:0, 1 + v7499:0, v7499:0, v7501:0, v7642:0, v7643:0, v7644:0, 0, 3, 4, 2) :|: v7640:0 > 1 && v7640:0 > 1 + v7499:0 && v7635:0 > 2 && v7499:0 > -1 && v7639:0 > 2 && v7633:0 > 3 && v7638:0 > 3 && v7637:0 > 4 && v7631:0 > 4 && v7632:0 > 5 48.77/13.31 f_775(v6499:0, v6500:0, v6501:0, v6502:0, v6503:0, v6504:0, 1, v6506:0, v6507:0, v6508:0, v6509:0, v6510:0, v6511:0, 1 + v8577:0, v6513:0, v6514:0, v6515:0, 0, 3, 4, 2) -> f_880(v6499:0, v6500:0, v6501:0, v6502:0, v6503:0, v8579:0, 1, v8577:0, 0, v6504:0, v6511:0, 1 + v8577:0, 1 + v8577:0, v6511:0, v6513:0, v6514:0, v6515:0, 3, 4, 5, 2) :|: v6502:0 > 5 && v6511:0 > 2 && v6504:0 > 3 && v6511:0 > 1 + v8577:0 && v6510:0 > 2 && v6509:0 > 3 && v6507:0 > 4 && v6508:0 > 5 && v6503:0 > 4 && v8577:0 > 0 && v6506:0 > 2 && v8579:0 > v8577:0 && v8579:0 > 0 48.77/13.31 f_775(v6499:0, v6500:0, v6501:0, v6502:0, v6503:0, v6504:0, 1, v6506:0, v6507:0, v6508:0, v6509:0, v6510:0, v6511:0, 1 + v8577:0, v6513:0, v6514:0, v6515:0, 0, 3, 4, 2) -> f_880(v6499:0, v6500:0, v6501:0, v6502:0, v6503:0, v8579:0, 1, v8577:0, 0, v6504:0, v6511:0, 1 + v8577:0, 1 + v8577:0, v6511:0, v6513:0, v6514:0, v6515:0, 3, 4, 5, 2) :|: v6502:0 > 5 && v6511:0 > 2 && v6504:0 > 3 && v6511:0 > 1 + v8577:0 && v6510:0 > 2 && v6509:0 > 3 && v6507:0 > 4 && v6508:0 > 5 && v6503:0 > 4 && v8577:0 > 0 && v6506:0 > 2 && v8579:0 < v8577:0 && v8579:0 > 0 48.77/13.31 f_880(v7628:0, v7629:0, v7630:0, v7631:0, v7632:0, v7641:0, 1, 1 + v8577:0, 0, v7637:0, v7638:0, v7639:0, v7635:0, v7633:0, v7642:0, v7643:0, v7644:0, 3, 4, 5, 2) -> f_880(v7628:0, v7629:0, v7630:0, v7631:0, v7632:0, v8579:0, 1, v8577:0, 0, v7637:0, v7638:0, v7639:0, 1 + v8577:0, v7641:0, v7642:0, v7643:0, v7644:0, 3, 4, 5, 2) :|: v8577:0 > 0 && v7641:0 > 2 && v7639:0 > 1 && v7638:0 > 2 && v8579:0 > 0 && v7637:0 > 3 && v7632:0 > 4 && v7631:0 > 3 && v7641:0 >= 1 + v8577:0 && v8579:0 > v8577:0 48.77/13.31 f_880(v7628:0, v7629:0, v7630:0, v7631:0, v7632:0, v7641:0, 1, 1 + v8577:0, 0, v7637:0, v7638:0, v7639:0, v7635:0, v7633:0, v7642:0, v7643:0, v7644:0, 3, 4, 5, 2) -> f_880(v7628:0, v7629:0, v7630:0, v7631:0, v7632:0, v8579:0, 1, v8577:0, 0, v7637:0, v7638:0, v7639:0, 1 + v8577:0, v7641:0, v7642:0, v7643:0, v7644:0, 3, 4, 5, 2) :|: v8577:0 > 0 && v7641:0 > 2 && v7639:0 > 1 && v7638:0 > 2 && v8579:0 > 0 && v7637:0 > 3 && v7632:0 > 4 && v7631:0 > 3 && v7641:0 >= 1 + v8577:0 && v8579:0 < v8577:0 48.77/13.31 f_775(v6499:0, v6500:0, v6501:0, v6502:0, v6503:0, v6504:0, 1, v6506:0, v6507:0, v6508:0, v6509:0, v6510:0, 1 + v7499:0, v6512:0, v6513:0, v6514:0, v6515:0, 0, 3, 4, 2) -> f_775(v6499:0, v6500:0, v6501:0, v6502:0, v6503:0, 1 + v7499:0, 1, v6512:0, v6507:0, v6508:0, v6509:0, v6510:0, v7499:0, v7501:0, v6513:0, v6514:0, v6515:0, 0, 3, 4, 2) :|: v6512:0 > 1 && v6504:0 > 1 && v7499:0 > -1 && v6510:0 > 1 && v6506:0 > 2 && v6509:0 > 2 && v6507:0 > 3 && v6502:0 > 4 && v6508:0 > 4 && v6503:0 > 3 && v6512:0 > 1 + v7499:0 48.77/13.31 Filtered unneeded arguments: 48.77/13.31 f_880(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21) -> f_880(x4, x5, x6, x8, x10, x11, x12, x13, x14) 48.77/13.31 f_775(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21) -> f_775(x4, x5, x6, x8, x9, x10, x11, x12, x13, x14) 48.77/13.31 Removed division, modulo operations, cleaned up constraints. Obtained 6 rules.P rules: 48.77/13.31 f_880(v7631:0, v7632:0, sum~cons_1~v7499:0, v7640:0, v7637:0, v7638:0, v7639:0, v7635:0, v7633:0) -> f_775(v7631:0, v7632:0, 1 + v7499:0, v7640:0, v7635:0, v7633:0, v7640:0, 1 + v7499:0, v7499:0, v7501:0) :|: v7640:0 > 1 + v7499:0 && v7640:0 > 1 && v7635:0 > 2 && v7499:0 > -1 && v7639:0 > 2 && v7633:0 > 3 && v7638:0 > 3 && v7637:0 > 4 && v7632:0 > 5 && v7631:0 > 4 && sum~cons_1~v7499:0 = 1 + v7499:0 48.77/13.31 f_775(v6502:0, v6503:0, v6504:0, v6506:0, v6507:0, v6508:0, v6509:0, v6510:0, v6511:0, sum~cons_1~v8577:0) -> f_880(v6502:0, v6503:0, v8579:0, v8577:0, v6504:0, v6511:0, 1 + v8577:0, 1 + v8577:0, v6511:0) :|: v6511:0 > 2 && v6502:0 > 5 && v6504:0 > 3 && v6511:0 > 1 + v8577:0 && v6510:0 > 2 && v6509:0 > 3 && v6507:0 > 4 && v6508:0 > 5 && v6503:0 > 4 && v8577:0 > 0 && v6506:0 > 2 && v8579:0 > 0 && v8579:0 > v8577:0 && sum~cons_1~v8577:0 = 1 + v8577:0 48.77/13.31 f_775(v6502:0, v6503:0, v6504:0, v6506:0, v6507:0, v6508:0, v6509:0, v6510:0, v6511:0, sum~cons_1~v8577:0) -> f_880(v6502:0, v6503:0, v8579:0, v8577:0, v6504:0, v6511:0, 1 + v8577:0, 1 + v8577:0, v6511:0) :|: v6511:0 > 2 && v6502:0 > 5 && v6504:0 > 3 && v6511:0 > 1 + v8577:0 && v6510:0 > 2 && v6509:0 > 3 && v6507:0 > 4 && v6508:0 > 5 && v6503:0 > 4 && v8577:0 > 0 && v6506:0 > 2 && v8579:0 > 0 && v8579:0 < v8577:0 && sum~cons_1~v8577:0 = 1 + v8577:0 48.77/13.31 f_880(v7631:0, v7632:0, v7641:0, sum~cons_1~v8577:0, v7637:0, v7638:0, v7639:0, v7635:0, v7633:0) -> f_880(v7631:0, v7632:0, v8579:0, v8577:0, v7637:0, v7638:0, v7639:0, 1 + v8577:0, v7641:0) :|: v7641:0 > 2 && v8577:0 > 0 && v7639:0 > 1 && v7638:0 > 2 && v8579:0 > 0 && v7637:0 > 3 && v7632:0 > 4 && v7631:0 > 3 && v8579:0 > v8577:0 && v7641:0 >= 1 + v8577:0 && sum~cons_1~v8577:0 = 1 + v8577:0 48.77/13.31 f_880(v7631:0, v7632:0, v7641:0, sum~cons_1~v8577:0, v7637:0, v7638:0, v7639:0, v7635:0, v7633:0) -> f_880(v7631:0, v7632:0, v8579:0, v8577:0, v7637:0, v7638:0, v7639:0, 1 + v8577:0, v7641:0) :|: v7641:0 > 2 && v8577:0 > 0 && v7639:0 > 1 && v7638:0 > 2 && v8579:0 > 0 && v7637:0 > 3 && v7632:0 > 4 && v7631:0 > 3 && v8579:0 < v8577:0 && v7641:0 >= 1 + v8577:0 && sum~cons_1~v8577:0 = 1 + v8577:0 48.77/13.31 f_775(v6502:0, v6503:0, v6504:0, v6506:0, v6507:0, v6508:0, v6509:0, v6510:0, sum~cons_1~v7499:0, v6512:0) -> f_775(v6502:0, v6503:0, 1 + v7499:0, v6512:0, v6507:0, v6508:0, v6509:0, v6510:0, v7499:0, v7501:0) :|: v6504:0 > 1 && v6512:0 > 1 && v7499:0 > -1 && v6510:0 > 1 && v6506:0 > 2 && v6509:0 > 2 && v6507:0 > 3 && v6502:0 > 4 && v6508:0 > 4 && v6512:0 > 1 + v7499:0 && v6503:0 > 3 && sum~cons_1~v7499:0 = 1 + v7499:0 48.77/13.31 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (9) 48.77/13.31 Obligation: 48.77/13.31 Rules: 48.77/13.31 f_880(v7631:0, v7632:0, sum~cons_1~v7499:0, v7640:0, v7637:0, v7638:0, v7639:0, v7635:0, v7633:0) -> f_775(v7631:0, v7632:0, 1 + v7499:0, v7640:0, v7635:0, v7633:0, v7640:0, 1 + v7499:0, v7499:0, v7501:0) :|: v7640:0 > 1 + v7499:0 && v7640:0 > 1 && v7635:0 > 2 && v7499:0 > -1 && v7639:0 > 2 && v7633:0 > 3 && v7638:0 > 3 && v7637:0 > 4 && v7632:0 > 5 && v7631:0 > 4 && sum~cons_1~v7499:0 = 1 + v7499:0 48.77/13.31 f_775(v6502:0, v6503:0, v6504:0, v6506:0, v6507:0, v6508:0, v6509:0, v6510:0, v6511:0, sum~cons_1~v8577:0) -> f_880(v6502:0, v6503:0, v8579:0, v8577:0, v6504:0, v6511:0, 1 + v8577:0, 1 + v8577:0, v6511:0) :|: v6511:0 > 2 && v6502:0 > 5 && v6504:0 > 3 && v6511:0 > 1 + v8577:0 && v6510:0 > 2 && v6509:0 > 3 && v6507:0 > 4 && v6508:0 > 5 && v6503:0 > 4 && v8577:0 > 0 && v6506:0 > 2 && v8579:0 > 0 && v8579:0 > v8577:0 && sum~cons_1~v8577:0 = 1 + v8577:0 48.77/13.31 f_775(x, x1, x2, x3, x4, x5, x6, x7, x8, x9) -> f_880(x, x1, x10, x11, x2, x8, 1 + x11, 1 + x11, x8) :|: x8 > 2 && x > 5 && x2 > 3 && x8 > 1 + x11 && x7 > 2 && x6 > 3 && x4 > 4 && x5 > 5 && x1 > 4 && x11 > 0 && x3 > 2 && x10 > 0 && x10 < x11 && x9 = 1 + x11 48.77/13.31 f_880(x12, x13, x14, x15, x16, x17, x18, x19, x20) -> f_880(x12, x13, x21, x22, x16, x17, x18, 1 + x22, x14) :|: x14 > 2 && x22 > 0 && x18 > 1 && x17 > 2 && x21 > 0 && x16 > 3 && x13 > 4 && x12 > 3 && x21 > x22 && x14 >= 1 + x22 && x15 = 1 + x22 48.77/13.31 f_880(x23, x24, x25, x26, x27, x28, x29, x30, x31) -> f_880(x23, x24, x32, x33, x27, x28, x29, 1 + x33, x25) :|: x25 > 2 && x33 > 0 && x29 > 1 && x28 > 2 && x32 > 0 && x27 > 3 && x24 > 4 && x23 > 3 && x32 < x33 && x25 >= 1 + x33 && x26 = 1 + x33 48.77/13.31 f_775(x34, x35, x36, x37, x38, x39, x40, x41, x42, x43) -> f_775(x34, x35, 1 + x44, x43, x38, x39, x40, x41, x44, x45) :|: x36 > 1 && x43 > 1 && x44 > -1 && x41 > 1 && x37 > 2 && x40 > 2 && x38 > 3 && x34 > 4 && x39 > 4 && x43 > 1 + x44 && x35 > 3 && x42 = 1 + x44 48.77/13.31 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (10) IRS2T2 (EQUIVALENT) 48.77/13.31 Transformed input IRS into an integer transition system.Used the following mapping from defined symbols to location IDs: 48.77/13.31 48.77/13.31 (f_880_10,1) 48.77/13.31 (f_775_10,2) 48.77/13.31 48.77/13.31 ---------------------------------------- 48.77/13.31 48.77/13.31 (11) 48.77/13.31 Obligation: 48.77/13.31 START: 0; 48.77/13.31 48.77/13.31 FROM: 0; 48.77/13.31 TO: 1; 48.77/13.31 48.77/13.31 FROM: 0; 48.77/13.31 TO: 2; 48.77/13.31 48.77/13.31 FROM: 1; 48.77/13.31 oldX0 := x0; 48.77/13.31 oldX1 := x1; 48.77/13.31 oldX2 := x2; 48.77/13.31 oldX3 := x3; 48.77/13.31 oldX4 := x4; 48.77/13.31 oldX5 := x5; 48.77/13.31 oldX6 := x6; 48.77/13.31 oldX7 := x7; 48.77/13.31 oldX8 := x8; 48.77/13.31 oldX9 := x9; 48.77/13.31 oldX10 := oldX2 - 1; 48.77/13.31 oldX11 := nondet(); 48.77/13.31 assume(oldX3 > 1 + oldX10 && oldX3 > 1 && oldX7 > 2 && oldX10 > -1 && oldX6 > 2 && oldX8 > 3 && oldX5 > 3 && oldX4 > 4 && oldX1 > 5 && oldX0 > 4 && oldX2 = 1 + oldX10); 48.77/13.31 x0 := oldX0; 48.77/13.31 x1 := oldX1; 48.77/13.31 x2 := 1 + oldX10; 48.77/13.31 x3 := oldX3; 48.77/13.31 x4 := oldX7; 48.77/13.31 x5 := oldX8; 48.77/13.31 x6 := oldX3; 48.77/13.31 x7 := 1 + oldX10; 48.77/13.31 x8 := oldX2 - 1; 48.77/13.31 x9 := oldX11; 48.77/13.31 TO: 2; 48.77/13.31 48.77/13.31 FROM: 2; 48.77/13.31 oldX0 := x0; 48.77/13.31 oldX1 := x1; 48.77/13.31 oldX2 := x2; 48.77/13.31 oldX3 := x3; 48.77/13.31 oldX4 := x4; 48.77/13.31 oldX5 := x5; 48.77/13.31 oldX6 := x6; 48.77/13.31 oldX7 := x7; 48.77/13.31 oldX8 := x8; 48.77/13.31 oldX9 := x9; 48.77/13.31 oldX11 := oldX9 - 1; 48.77/13.31 oldX10 := nondet(); 48.77/13.31 oldX12 := nondet(); 48.77/13.31 assume(oldX8 > 2 && oldX0 > 5 && oldX2 > 3 && oldX8 > 1 + oldX11 && oldX7 > 2 && oldX6 > 3 && oldX4 > 4 && oldX5 > 5 && oldX1 > 4 && oldX11 > 0 && oldX3 > 2 && oldX10 > 0 && oldX10 > oldX11 && oldX9 = 1 + oldX11); 48.77/13.31 x0 := oldX0; 48.77/13.31 x1 := oldX1; 48.77/13.31 x2 := oldX10; 48.77/13.31 x3 := oldX9 - 1; 48.77/13.31 x4 := oldX2; 48.77/13.31 x5 := oldX8; 48.77/13.31 x6 := 1 + oldX11; 48.77/13.31 x7 := 1 + oldX11; 48.77/13.31 x8 := oldX8; 48.77/13.31 x9 := oldX12; 48.77/13.31 TO: 1; 48.77/13.31 48.77/13.31 FROM: 2; 48.77/13.31 oldX0 := x0; 48.77/13.31 oldX1 := x1; 48.77/13.31 oldX2 := x2; 48.77/13.31 oldX3 := x3; 48.77/13.31 oldX4 := x4; 48.77/13.31 oldX5 := x5; 48.77/13.31 oldX6 := x6; 48.77/13.31 oldX7 := x7; 48.77/13.31 oldX8 := x8; 48.77/13.31 oldX9 := x9; 48.77/13.31 oldX11 := oldX9 - 1; 48.77/13.31 oldX10 := nondet(); 48.77/13.31 oldX12 := nondet(); 48.77/13.31 assume(oldX8 > 2 && oldX0 > 5 && oldX2 > 3 && oldX8 > 1 + oldX11 && oldX7 > 2 && oldX6 > 3 && oldX4 > 4 && oldX5 > 5 && oldX1 > 4 && oldX11 > 0 && oldX3 > 2 && oldX10 > 0 && oldX10 < oldX11 && oldX9 = 1 + oldX11); 48.77/13.31 x0 := oldX0; 48.77/13.31 x1 := oldX1; 48.77/13.31 x2 := oldX10; 48.77/13.31 x3 := oldX9 - 1; 48.77/13.31 x4 := oldX2; 48.77/13.31 x5 := oldX8; 48.77/13.31 x6 := 1 + oldX11; 48.77/13.31 x7 := 1 + oldX11; 48.77/13.31 x8 := oldX8; 48.77/13.31 x9 := oldX12; 48.77/13.31 TO: 1; 48.77/13.31 48.77/13.31 FROM: 1; 48.77/13.31 oldX0 := x0; 48.77/13.31 oldX1 := x1; 48.77/13.31 oldX2 := x2; 48.77/13.31 oldX3 := x3; 48.77/13.31 oldX4 := x4; 48.77/13.31 oldX5 := x5; 48.77/13.31 oldX6 := x6; 48.77/13.31 oldX7 := x7; 48.77/13.31 oldX8 := x8; 48.77/13.31 oldX9 := x9; 48.77/13.31 oldX11 := oldX3 - 1; 48.77/13.31 oldX10 := nondet(); 48.77/13.31 oldX12 := nondet(); 48.77/13.31 assume(oldX2 > 2 && oldX11 > 0 && oldX6 > 1 && oldX5 > 2 && oldX10 > 0 && oldX4 > 3 && oldX1 > 4 && oldX0 > 3 && oldX10 > oldX11 && oldX2 >= 1 + oldX11 && oldX3 = 1 + oldX11); 48.77/13.31 x0 := oldX0; 48.77/13.31 x1 := oldX1; 48.77/13.31 x2 := oldX10; 48.77/13.31 x3 := oldX3 - 1; 48.77/13.31 x4 := oldX4; 48.77/13.31 x5 := oldX5; 48.77/13.31 x6 := oldX6; 48.77/13.31 x7 := 1 + oldX11; 48.77/13.31 x8 := oldX2; 48.77/13.31 x9 := oldX12; 48.77/13.31 TO: 1; 48.77/13.31 48.77/13.31 FROM: 1; 48.77/13.31 oldX0 := x0; 48.77/13.31 oldX1 := x1; 48.77/13.31 oldX2 := x2; 48.77/13.31 oldX3 := x3; 48.77/13.31 oldX4 := x4; 48.77/13.31 oldX5 := x5; 48.77/13.31 oldX6 := x6; 48.77/13.31 oldX7 := x7; 48.77/13.31 oldX8 := x8; 48.77/13.31 oldX9 := x9; 48.77/13.31 oldX11 := oldX3 - 1; 48.77/13.31 oldX10 := nondet(); 48.77/13.31 oldX12 := nondet(); 48.77/13.31 assume(oldX2 > 2 && oldX11 > 0 && oldX6 > 1 && oldX5 > 2 && oldX10 > 0 && oldX4 > 3 && oldX1 > 4 && oldX0 > 3 && oldX10 < oldX11 && oldX2 >= 1 + oldX11 && oldX3 = 1 + oldX11); 48.77/13.31 x0 := oldX0; 48.77/13.31 x1 := oldX1; 48.77/13.31 x2 := oldX10; 48.77/13.31 x3 := oldX3 - 1; 48.77/13.31 x4 := oldX4; 48.77/13.31 x5 := oldX5; 48.77/13.31 x6 := oldX6; 48.77/13.31 x7 := 1 + oldX11; 48.77/13.31 x8 := oldX2; 48.77/13.31 x9 := oldX12; 48.77/13.31 TO: 1; 48.77/13.31 48.77/13.31 FROM: 2; 48.77/13.31 oldX0 := x0; 48.77/13.31 oldX1 := x1; 48.77/13.31 oldX2 := x2; 48.77/13.31 oldX3 := x3; 48.77/13.31 oldX4 := x4; 48.77/13.31 oldX5 := x5; 48.77/13.31 oldX6 := x6; 48.77/13.31 oldX7 := x7; 48.77/13.31 oldX8 := x8; 48.77/13.31 oldX9 := x9; 48.77/13.31 oldX10 := oldX8 - 1; 48.77/13.31 oldX11 := nondet(); 48.77/13.31 assume(oldX2 > 1 && oldX9 > 1 && oldX10 > -1 && oldX7 > 1 && oldX3 > 2 && oldX6 > 2 && oldX4 > 3 && oldX0 > 4 && oldX5 > 4 && oldX9 > 1 + oldX10 && oldX1 > 3 && oldX8 = 1 + oldX10); 48.77/13.31 x0 := oldX0; 48.77/13.32 x1 := oldX1; 48.77/13.32 x2 := 1 + oldX10; 48.77/13.32 x3 := oldX9; 48.77/13.32 x4 := oldX4; 48.77/13.32 x5 := oldX5; 48.77/13.32 x6 := oldX6; 48.77/13.32 x7 := oldX7; 48.77/13.32 x8 := oldX8 - 1; 48.77/13.32 x9 := oldX11; 48.77/13.32 TO: 2; 48.77/13.32 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (12) T2 (EQUIVALENT) 48.77/13.32 Initially, performed program simplifications using lexicographic rank functions: 48.77/13.32 * Removed transitions 2, 5, 6, 7, 17, 20, 21, 22 using the following rank functions: 48.77/13.32 - Rank function 1: 48.77/13.32 RF for loc. 6: 2*x3 48.77/13.32 RF for loc. 7: -2+2*x8 48.77/13.32 RF for loc. 8: -1+2*x3 48.77/13.32 RF for loc. 12: -3+2*x8 48.77/13.32 Bound for (chained) transitions 5: 3 48.77/13.32 Bound for (chained) transitions 6: 3 48.77/13.32 Bound for (chained) transitions 7: 3 48.77/13.32 Bound for (chained) transitions 20: 3 48.77/13.32 Bound for (chained) transitions 21: 3 48.77/13.32 Bound for (chained) transitions 22: -1 48.77/13.32 - Rank function 2: 48.77/13.32 RF for loc. 6: 0 48.77/13.32 RF for loc. 7: 1 48.77/13.32 RF for loc. 8: -1 48.77/13.32 RF for loc. 12: 0 48.77/13.32 Bound for (chained) transitions 2: 0 48.77/13.32 Bound for (chained) transitions 17: 1 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (13) 48.77/13.32 YES 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (14) 48.77/13.32 Obligation: 48.77/13.32 SCC 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (15) SCC2IRS (SOUND) 48.77/13.32 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 48.77/13.32 Generated rules. Obtained 32 rulesP rules: 48.77/13.32 f_442(v1563, v1564, v1565, v1566, v1567, v1568, 1, v1570, 0, v1572, v1573, v1574, v1575, v1576, 3, 2, 4) -> f_444(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1570, v1568, 0, v1572, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_444(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1570, v1568, 0, v1572, v1574, v1575, v1576, 3, 2, 4) -> f_447(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1570, v1568, 0, v1572, v1574, v1575, v1576, 3, 2, 4) :|: 0 < v1573 48.77/13.32 f_447(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1570, v1568, 0, v1572, v1574, v1575, v1576, 3, 2, 4) -> f_451(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1570, v1568, 0, v1572, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_451(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1570, v1568, 0, v1572, v1574, v1575, v1576, 3, 2, 4) -> f_455(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1570, v1568, 0, v1572, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_455(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1570, v1568, 0, v1572, v1574, v1575, v1576, 3, 2, 4) -> f_459(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, v1568, 0, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_459(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, v1568, 0, v1574, v1575, v1576, 3, 2, 4) -> f_463(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, v1568, 0, v1574, v1575, v1576, 3, 2, 4) :|: 0 < v1572 && 2 <= v1570 && 3 <= v1566 && 3 <= v1568 && 2 <= v1567 48.77/13.32 f_463(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, v1568, 0, v1574, v1575, v1576, 3, 2, 4) -> f_467(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, v1568, 0, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_467(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, v1568, 0, v1574, v1575, v1576, 3, 2, 4) -> f_471(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, v1568, 0, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_471(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, v1568, 0, v1574, v1575, v1576, 3, 2, 4) -> f_475(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_475(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) -> f_479(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_479(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) -> f_482(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) :|: v1572 != v1573 48.77/13.32 f_482(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) -> f_485(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_485(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) -> f_488(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_488(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) -> f_491(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_491(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1568, v1570, 0, v1574, v1575, v1576, 3, 2, 4) -> f_494(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, 0, v1568, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_494(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, v1570, 0, v1568, v1574, v1575, v1576, 3, 2, 4) -> f_496(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1568, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_496(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1568, v1574, v1575, v1576, 3, 2, 4) -> f_499(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1568, v1574, v1575, v1576, 3, 2, 4) :|: v1572 <= v1573 && 2 <= v1573 48.77/13.32 f_499(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1568, v1574, v1575, v1576, 3, 2, 4) -> f_503(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1568, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_503(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1568, v1574, v1575, v1576, 3, 2, 4) -> f_507(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1568, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_507(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1568, v1574, v1575, v1576, 3, 2, 4) -> f_511(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1568, v1570, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_511(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1568, v1570, v1574, v1575, v1576, 3, 2, 4) -> f_515(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_515(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1574, v1575, v1576, 3, 2, 4) -> f_519(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_519(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1574, v1575, v1576, 3, 2, 4) -> f_523(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_523(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1570, v1574, v1575, v1576, 3, 2, 4) -> f_527(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1574, v1575, v1576, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_527(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v1574, v1575, v1576, 3, 2, 4) -> f_531(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v1574, v1575, v1576, 3, 2, 4) :|: 1 + v2272 = v1572 && 0 <= v2272 48.77/13.32 f_531(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v1574, v1575, v1576, 3, 2, 4) -> f_534(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_534(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v1574, v1575, v1576, 3, 2, 4) -> f_538(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_538(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) -> f_543(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_543(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) -> f_548(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_548(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) -> f_553(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_553(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) -> f_440(v1563, v1564, v1565, v1566, v1567, v1573, 1, v1572, 0, v2272, v2300, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 f_440(v1563, v1564, v1565, v1566, v1567, v1568, 1, v1570, 0, v1572, v1573, v1574, v1575, v1576, 3, 2, 4) -> f_442(v1563, v1564, v1565, v1566, v1567, v1568, 1, v1570, 0, v1572, v1573, v1574, v1575, v1576, 3, 2, 4) :|: TRUE 48.77/13.32 Combined rules. Obtained 1 rulesP rules: 48.77/13.32 f_442(v1563:0, v1564:0, v1565:0, v1566:0, v1567:0, v1568:0, 1, v1570:0, 0, 1 + v2272:0, v1573:0, v1574:0, v1575:0, v1576:0, 3, 2, 4) -> f_442(v1563:0, v1564:0, v1565:0, v1566:0, v1567:0, v1573:0, 1, 1 + v2272:0, 0, v2272:0, v2300:0, v1574:0, v1575:0, v1576:0, 3, 2, 4) :|: v1573:0 > 1 && v1573:0 > 1 + v2272:0 && v1570:0 > 1 && v2272:0 > -1 && v1566:0 > 2 && v1568:0 > 2 && v1567:0 > 1 48.77/13.32 Filtered unneeded arguments: 48.77/13.32 f_442(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17) -> f_442(x4, x5, x6, x8, x10, x11) 48.77/13.32 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 48.77/13.32 f_442(v1566:0, v1567:0, v1568:0, v1570:0, sum~cons_1~v2272:0, v1573:0) -> f_442(v1566:0, v1567:0, v1573:0, 1 + v2272:0, v2272:0, v2300:0) :|: v1573:0 > 1 + v2272:0 && v1573:0 > 1 && v1570:0 > 1 && v2272:0 > -1 && v1566:0 > 2 && v1567:0 > 1 && v1568:0 > 2 && sum~cons_1~v2272:0 = 1 + v2272:0 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (16) 48.77/13.32 Obligation: 48.77/13.32 Rules: 48.77/13.32 f_442(v1566:0, v1567:0, v1568:0, v1570:0, sum~cons_1~v2272:0, v1573:0) -> f_442(v1566:0, v1567:0, v1573:0, 1 + v2272:0, v2272:0, v2300:0) :|: v1573:0 > 1 + v2272:0 && v1573:0 > 1 && v1570:0 > 1 && v2272:0 > -1 && v1566:0 > 2 && v1567:0 > 1 && v1568:0 > 2 && sum~cons_1~v2272:0 = 1 + v2272:0 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (17) IntTRSCompressionProof (EQUIVALENT) 48.77/13.32 Compressed rules. 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (18) 48.77/13.32 Obligation: 48.77/13.32 Rules: 48.77/13.32 f_442(v1566:0:0, v1567:0:0, v1568:0:0, v1570:0:0, sum~cons_1~v2272:0:0, v1573:0:0) -> f_442(v1566:0:0, v1567:0:0, v1573:0:0, 1 + v2272:0:0, v2272:0:0, v2300:0:0) :|: v1567:0:0 > 1 && v1568:0:0 > 2 && v1566:0:0 > 2 && v2272:0:0 > -1 && v1570:0:0 > 1 && v1573:0:0 > 1 && v1573:0:0 > 1 + v2272:0:0 && sum~cons_1~v2272:0:0 = 1 + v2272:0:0 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (19) RankingReductionPairProof (EQUIVALENT) 48.77/13.32 Interpretation: 48.77/13.32 [ f_442 ] = f_442_5 48.77/13.32 48.77/13.32 The following rules are decreasing: 48.77/13.32 f_442(v1566:0:0, v1567:0:0, v1568:0:0, v1570:0:0, sum~cons_1~v2272:0:0, v1573:0:0) -> f_442(v1566:0:0, v1567:0:0, v1573:0:0, 1 + v2272:0:0, v2272:0:0, v2300:0:0) :|: v1567:0:0 > 1 && v1568:0:0 > 2 && v1566:0:0 > 2 && v2272:0:0 > -1 && v1570:0:0 > 1 && v1573:0:0 > 1 && v1573:0:0 > 1 + v2272:0:0 && sum~cons_1~v2272:0:0 = 1 + v2272:0:0 48.77/13.32 48.77/13.32 The following rules are bounded: 48.77/13.32 f_442(v1566:0:0, v1567:0:0, v1568:0:0, v1570:0:0, sum~cons_1~v2272:0:0, v1573:0:0) -> f_442(v1566:0:0, v1567:0:0, v1573:0:0, 1 + v2272:0:0, v2272:0:0, v2300:0:0) :|: v1567:0:0 > 1 && v1568:0:0 > 2 && v1566:0:0 > 2 && v2272:0:0 > -1 && v1570:0:0 > 1 && v1573:0:0 > 1 && v1573:0:0 > 1 + v2272:0:0 && sum~cons_1~v2272:0:0 = 1 + v2272:0:0 48.77/13.32 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (20) 48.77/13.32 YES 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (21) 48.77/13.32 Obligation: 48.77/13.32 SCC 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (22) SCC2IRS (SOUND) 48.77/13.32 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 48.77/13.32 Generated rules. Obtained 27 rulesP rules: 48.77/13.32 f_383(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1177, v1175, v1179, v1180, v1181, v1182, 0, 3, 2, 4) -> f_386(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1177, v1175, v1179, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 < v1178 && 2 <= v1175 && 3 <= v1174 && 3 <= v1177 && 2 <= v1173 48.77/13.32 f_386(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1177, v1175, v1179, v1180, v1181, v1182, 0, 3, 2, 4) -> f_390(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1177, v1175, v1179, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_390(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1177, v1175, v1179, v1180, v1181, v1182, 0, 3, 2, 4) -> f_394(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1177, v1175, v1179, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_394(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1177, v1175, v1179, v1180, v1181, v1182, 0, 3, 2, 4) -> f_398(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_398(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_402(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 < v1179 48.77/13.32 f_402(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_406(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_406(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_410(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_410(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_414(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_414(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) -> f_418(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_418(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) -> f_421(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) :|: v1179 != v1178 48.77/13.32 f_421(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) -> f_425(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_425(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) -> f_430(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_430(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) -> f_435(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_435(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1177, v1180, v1181, v1182, 0, 3, 2, 4) -> f_441(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_441(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1177, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_443(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_443(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_445(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: v1178 < v1179 && 2 <= v1179 48.77/13.32 f_445(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_449(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_449(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_453(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_453(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1175, v1180, v1181, v1182, 0, 3, 2, 4) -> f_457(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 f_457(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1180, v1181, v1182, 0, 3, 2, 4) -> f_461(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1180, v1181, v1182, 0, 3, 2, 4) :|: 1 + v1644 = v1178 && 0 <= v1644 48.77/13.32 f_461(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1180, v1181, v1182, 0, 3, 2, 4) -> f_465(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_465(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1180, v1181, v1182, 0, 3, 2, 4) -> f_469(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_469(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) -> f_473(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_473(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) -> f_477(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_477(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) -> f_480(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_480(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) -> f_381(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1179, v1644, v1646, v1180, v1181, v1182, 0, 3, 2, 4) :|: TRUE 48.77/13.32 f_381(v1170, v1171, v1172, v1173, v1174, v1175, 1, v1177, v1178, v1179, v1180, v1181, v1182, 0, 3, 2, 4) -> f_383(v1170, v1171, v1172, v1173, v1174, v1178, 1, v1177, v1175, v1179, v1180, v1181, v1182, 0, 3, 2, 4) :|: 0 = 0 48.77/13.32 Combined rules. Obtained 1 rulesP rules: 48.77/13.32 f_383(v1170:0, v1171:0, v1172:0, v1173:0, v1174:0, 1 + v1644:0, 1, v1177:0, v1175:0, v1179:0, v1180:0, v1181:0, v1182:0, 0, 3, 2, 4) -> f_383(v1170:0, v1171:0, v1172:0, v1173:0, v1174:0, v1644:0, 1, v1179:0, 1 + v1644:0, v1646:0, v1180:0, v1181:0, v1182:0, 0, 3, 2, 4) :|: v1179:0 > 1 && v1175:0 > 1 && v1644:0 > -1 && v1174:0 > 2 && v1177:0 > 2 && v1173:0 > 1 && v1179:0 > 1 + v1644:0 48.77/13.32 Filtered unneeded arguments: 48.77/13.32 f_383(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17) -> f_383(x4, x5, x6, x8, x9, x10) 48.77/13.32 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 48.77/13.32 f_383(v1173:0, v1174:0, sum~cons_1~v1644:0, v1177:0, v1175:0, v1179:0) -> f_383(v1173:0, v1174:0, v1644:0, v1179:0, 1 + v1644:0, v1646:0) :|: v1175:0 > 1 && v1179:0 > 1 && v1644:0 > -1 && v1174:0 > 2 && v1177:0 > 2 && v1179:0 > 1 + v1644:0 && v1173:0 > 1 && sum~cons_1~v1644:0 = 1 + v1644:0 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (23) 48.77/13.32 Obligation: 48.77/13.32 Rules: 48.77/13.32 f_383(v1173:0, v1174:0, sum~cons_1~v1644:0, v1177:0, v1175:0, v1179:0) -> f_383(v1173:0, v1174:0, v1644:0, v1179:0, 1 + v1644:0, v1646:0) :|: v1175:0 > 1 && v1179:0 > 1 && v1644:0 > -1 && v1174:0 > 2 && v1177:0 > 2 && v1179:0 > 1 + v1644:0 && v1173:0 > 1 && sum~cons_1~v1644:0 = 1 + v1644:0 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (24) IRS2T2 (EQUIVALENT) 48.77/13.32 Transformed input IRS into an integer transition system.Used the following mapping from defined symbols to location IDs: 48.77/13.32 48.77/13.32 (f_383_6,1) 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (25) 48.77/13.32 Obligation: 48.77/13.32 START: 0; 48.77/13.32 48.77/13.32 FROM: 0; 48.77/13.32 TO: 1; 48.77/13.32 48.77/13.32 FROM: 1; 48.77/13.32 oldX0 := x0; 48.77/13.32 oldX1 := x1; 48.77/13.32 oldX2 := x2; 48.77/13.32 oldX3 := x3; 48.77/13.32 oldX4 := x4; 48.77/13.32 oldX5 := x5; 48.77/13.32 oldX6 := oldX2 - 1; 48.77/13.32 oldX7 := nondet(); 48.77/13.32 assume(oldX4 > 1 && oldX5 > 1 && oldX6 > -1 && oldX1 > 2 && oldX3 > 2 && oldX5 > 1 + oldX6 && oldX0 > 1 && oldX2 = 1 + oldX6); 48.77/13.32 x0 := oldX0; 48.77/13.32 x1 := oldX1; 48.77/13.32 x2 := oldX2 - 1; 48.77/13.32 x3 := oldX5; 48.77/13.32 x4 := 1 + oldX6; 48.77/13.32 x5 := oldX7; 48.77/13.32 TO: 1; 48.77/13.32 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (26) T2 (EQUIVALENT) 48.77/13.32 Initially, performed program simplifications using lexicographic rank functions: 48.77/13.32 * Removed transitions 1, 3, 4 using the following rank functions: 48.77/13.32 - Rank function 1: 48.77/13.32 RF for loc. 5: 1+2*x2 48.77/13.32 RF for loc. 6: 2*x2 48.77/13.32 Bound for (chained) transitions 4: 2 48.77/13.32 - Rank function 2: 48.77/13.32 RF for loc. 5: 1+2*x2 48.77/13.32 RF for loc. 6: 2*x2 48.77/13.32 Bound for (chained) transitions 3: 2 48.77/13.32 - Rank function 3: 48.77/13.32 RF for loc. 5: 1 48.77/13.32 RF for loc. 6: 0 48.77/13.32 Bound for (chained) transitions 1: 1 48.77/13.32 48.77/13.32 ---------------------------------------- 48.77/13.32 48.77/13.32 (27) 48.77/13.32 YES 49.18/13.37 EOF