48.72/12.36	YES
48.72/12.36	property Termination
48.72/12.36	has value True
48.72/12.36	for SRS ( [a] -> [], [a, b] -> [b, a, c, a], [b] -> [], [c, c, c] -> [b])
48.72/12.36	reason
48.72/12.36	  remap for 4 rules
48.72/12.36	   property Termination
48.72/12.36	has value True
48.72/12.36	for SRS ( [0] -> [], [0, 1] -> [1, 0, 2, 0], [1] -> [], [2, 2, 2] -> [1])
48.72/12.36	reason
48.72/12.36	  DP transform
48.72/12.36	   property Termination
48.72/12.36	has value True
48.72/12.40	for SRS ( [0] ->= [], [0, 1] ->= [1, 0, 2, 0], [1] ->= [], [2, 2, 2] ->= [1], [0#, 1] |-> [1#, 0, 2, 0], [0#, 1] |-> [0#, 2, 0], [0#, 1] |-> [2#, 0], [0#, 1] |-> [0#], [2#, 2, 2] |-> [1#])
48.72/12.40	reason
48.72/12.40	  remap for 9 rules
48.72/12.40	   property Termination
48.72/12.40	has value True
48.72/12.40	for SRS ( [0] ->= [], [0, 1] ->= [1, 0, 2, 0], [1] ->= [], [2, 2, 2] ->= [1], [3, 1] |-> [4, 0, 2, 0], [3, 1] |-> [3, 2, 0], [3, 1] |-> [5, 0], [3, 1] |-> [3], [5, 2, 2] |-> [4])
48.72/12.40	reason
48.72/12.40	  weights
48.72/12.40	    Map [(3, 2/1), (5, 1/1)]
48.72/12.40	  
48.72/12.40	   property Termination
48.72/12.40	has value True
48.72/12.40	for SRS ( [0] ->= [], [0, 1] ->= [1, 0, 2, 0], [1] ->= [], [2, 2, 2] ->= [1], [3, 1] |-> [3, 2, 0], [3, 1] |-> [3])
48.72/12.40	reason
48.72/12.40	  EDG has 1 SCCs
48.72/12.40	   property Termination
48.72/12.40	has value True
48.72/12.40	for SRS ( [3, 1] |-> [3, 2, 0], [3, 1] |-> [3], [0] ->= [], [0, 1] ->= [1, 0, 2, 0], [1] ->= [], [2, 2, 2] ->= [1])
48.72/12.40	reason
48.72/12.40	  Matrix   { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False}
48.72/12.40	    interpretation
49.03/12.43	      0 Wk  / 0A 5A 0A -  \
49.03/12.43	            | -  0A -  -  |
49.03/12.43	            | -  2A 1A -  |
49.03/12.43	            \ -  -  -  0A /
49.03/12.43	      1 Wk  / 0A 7A 0A -  \
49.03/12.43	            | -  0A -  -  |
49.03/12.43	            | 1A 6A 1A 4A |
49.03/12.43	            \ -  -  -  0A /
49.03/12.43	      2 Wk  / 1A 5A 0A 3A \
49.03/12.43	            | -  0A -  -  |
49.03/12.43	            | 0A -  -  3A |
49.03/12.43	            \ -  -  -  0A /
49.03/12.43	      3 Wk  / -  2A 0A 0A \
49.03/12.43	            | -  6A 1A 1A |
49.03/12.43	            | 0A 3A 0A 0A |
49.03/12.43	            \ -  -  -  0A /
49.03/12.43	    [3, 1] |-> [3, 2, 0]
49.03/12.43	     lhs                   rhs                   ge     gt
49.03/12.43	       Wk  / 1A 6A 1A 4A \   Wk  / 0A 5A 0A 3A \   True   False
49.03/12.43	           | 2A 7A 2A 5A |       | 1A 6A 1A 4A |        
49.03/12.43	           | 1A 7A 1A 4A |       | 1A 6A 1A 3A |        
49.03/12.43	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.43	    [3, 1] |-> [3]
49.03/12.45	     lhs                   rhs                   ge     gt
49.03/12.45	       Wk  / 1A 6A 1A 4A \   Wk  / -  2A 0A 0A \   True   True
49.03/12.45	           | 2A 7A 2A 5A |       | -  6A 1A 1A |        
49.03/12.45	           | 1A 7A 1A 4A |       | 0A 3A 0A 0A |        
49.03/12.45	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.45	    [0] ->= []
49.03/12.45	     lhs                   rhs                   ge     gt
49.03/12.45	       Wk  / 0A 5A 0A -  \   Wk  / 0A -  -  -  \   True   False
49.03/12.45	           | -  0A -  -  |       | -  0A -  -  |        
49.03/12.45	           | -  2A 1A -  |       | -  -  0A -  |        
49.03/12.45	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.45	    [0, 1] ->= [1, 0, 2, 0]
49.03/12.45	     lhs                   rhs                   ge     gt
49.03/12.45	       Wk  / 1A 7A 1A 4A \   Wk  / 1A 7A 1A 4A \   True   False
49.03/12.45	           | -  0A -  -  |       | -  0A -  -  |        
49.03/12.45	           | 2A 7A 2A 5A |       | 2A 7A 2A 5A |        
49.03/12.45	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.45	    [1] ->= []
49.03/12.46	     lhs                   rhs                   ge     gt
49.03/12.46	       Wk  / 0A 7A 0A -  \   Wk  / 0A -  -  -  \   True   False
49.03/12.46	           | -  0A -  -  |       | -  0A -  -  |        
49.03/12.46	           | 1A 6A 1A 4A |       | -  -  0A -  |        
49.03/12.46	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.46	    [2, 2, 2] ->= [1]
49.03/12.46	     lhs                   rhs                   ge     gt
49.03/12.46	       Wk  / 3A 7A 2A 5A \   Wk  / 0A 7A 0A -  \   True   False
49.03/12.46	           | -  0A -  -  |       | -  0A -  -  |        
49.03/12.46	           | 2A 6A 1A 4A |       | 1A 6A 1A 4A |        
49.03/12.46	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.46	   property Termination
49.03/12.46	has value True
49.03/12.46	for SRS ( [3, 1] |-> [3, 2, 0], [0] ->= [], [0, 1] ->= [1, 0, 2, 0], [1] ->= [], [2, 2, 2] ->= [1])
49.03/12.46	reason
49.03/12.46	  EDG has 1 SCCs
49.03/12.46	   property Termination
49.03/12.46	has value True
49.03/12.46	for SRS ( [3, 1] |-> [3, 2, 0], [0] ->= [], [0, 1] ->= [1, 0, 2, 0], [1] ->= [], [2, 2, 2] ->= [1])
49.03/12.46	reason
49.03/12.46	  Matrix   { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False}
49.03/12.46	    interpretation
49.03/12.47	      0 Wk  / 0A -  0A -  \
49.03/12.47	            | -  0A 0A -  |
49.03/12.47	            | -  0A 3A 2A |
49.03/12.47	            \ -  -  -  0A /
49.03/12.47	      1 Wk  / 0A 0A 0A 6A \
49.03/12.47	            | -  0A -  6A |
49.03/12.47	            | 3A 3A 3A -  |
49.03/12.47	            \ -  -  -  0A /
49.03/12.47	      2 Wk  / -  1A 0A 3A \
49.03/12.47	            | 3A 1A -  -  |
49.03/12.47	            | 0A 0A -  -  |
49.03/12.47	            \ -  -  -  0A /
49.03/12.47	      3 Wk  / 1A - 4A 6A \
49.03/12.47	            | -  - -  -  |
49.03/12.47	            | -  - -  -  |
49.03/12.47	            \ -  - -  0A /
49.03/12.47	    [3, 1] |-> [3, 2, 0]
49.03/12.47	     lhs                   rhs                   ge     gt
49.03/12.47	       Wk  / 7A 7A 7A 7A \   Wk  / 4A 4A 4A 6A \   True   True
49.03/12.47	           | -  -  -  -  |       | -  -  -  -  |        
49.03/12.47	           | -  -  -  -  |       | -  -  -  -  |        
49.03/12.47	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.47	    [0] ->= []
49.03/12.48	     lhs                   rhs                   ge     gt
49.03/12.48	       Wk  / 0A -  0A -  \   Wk  / 0A -  -  -  \   True   False
49.03/12.48	           | -  0A 0A -  |       | -  0A -  -  |        
49.03/12.48	           | -  0A 3A 2A |       | -  -  0A -  |        
49.03/12.48	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.48	    [0, 1] ->= [1, 0, 2, 0]
49.03/12.48	     lhs                   rhs                   ge     gt
49.03/12.48	       Wk  / 3A 3A 3A 6A \   Wk  / 3A 3A 3A 6A \   True   False
49.03/12.48	           | 3A 3A 3A 6A |       | 3A 1A 3A 6A |        
49.03/12.48	           | 6A 6A 6A 6A |       | 6A 6A 6A 6A |        
49.03/12.48	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.48	    [1] ->= []
49.03/12.48	     lhs                   rhs                   ge     gt
49.03/12.48	       Wk  / 0A 0A 0A 6A \   Wk  / 0A -  -  -  \   True   False
49.03/12.48	           | -  0A -  6A |       | -  0A -  -  |        
49.03/12.48	           | 3A 3A 3A -  |       | -  -  0A -  |        
49.03/12.48	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.48	    [2, 2, 2] ->= [1]
49.03/12.48	     lhs                   rhs                   ge     gt
49.03/12.48	       Wk  / 5A 5A 4A 7A \   Wk  / 0A 0A 0A 6A \   True   False
49.03/12.48	           | 7A 5A 4A 7A |       | -  0A -  6A |        
49.03/12.48	           | 4A 4A 3A 6A |       | 3A 3A 3A -  |        
49.03/12.48	           \ -  -  -  0A /       \ -  -  -  0A /        
49.03/12.48	   property Termination
49.03/12.48	has value True
49.03/12.48	for SRS ( [0] ->= [], [0, 1] ->= [1, 0, 2, 0], [1] ->= [], [2, 2, 2] ->= [1])
49.03/12.48	reason
49.03/12.48	  EDG has 0 SCCs
49.03/12.48	
49.03/12.48	**************************************************
49.03/12.48	          summary
49.03/12.48	**************************************************
49.03/12.48	SRS with 4 rules on 3 letters       Remap   { tracing = False}
49.03/12.48	SRS with 4 rules on 3 letters       DP transform
49.03/12.48	SRS with 9 rules on 6 letters       Remap   { tracing = False}
49.03/12.48	SRS with 9 rules on 6 letters       weights
49.03/12.48	SRS with 6 rules on 4 letters       EDG
49.03/12.48	SRS with 6 rules on 4 letters       Matrix   { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False}
49.03/12.48	SRS with 5 rules on 4 letters       EDG
49.03/12.48	SRS with 5 rules on 4 letters       Matrix   { monotone = Weak, domain = Arctic, bits = 3, dim = 4, solver = Minisatapi, verbose = False, tracing = False}
49.03/12.48	SRS with 4 rules on 3 letters       EDG
49.03/12.48	
49.03/12.48	**************************************************
49.03/12.48	(4, 3)\Deepee(9, 6)\Weight(6, 4)\Matrix{\Arctic}{4}(5, 4)\Matrix{\Arctic}{4}(4, 3)\EDG[]
49.03/12.48	**************************************************
49.32/12.56	let { done = Worker No_Strict_Rules;mo = Pre (Or_Else Count (IfSizeLeq 10000 GLPK Fail));wop = Or_Else (Worker (Weight { modus = mo})) Pass;weighted = \ m -> And_Then m wop;tiling = \ m w -> weighted (And_Then (Worker (Tiling { method = m,width = w})) (Worker Remap));when_small = \ m -> And_Then (Worker (SizeAtmost 100)) m;when_medium = \ m -> And_Then (Worker (SizeAtmost 10000)) m;solver = Minisatapi;qpi = \ dim bits -> weighted (when_small (Worker (QPI { tracing = True,dim = dim,bits = bits,solver = solver})));matrix = \ dom dim bits -> weighted (when_small (Worker (Matrix { monotone = Weak,domain = dom,dim = dim,bits = bits,tracing = False,solver = solver})));kbo = \ b -> weighted (when_small (Worker (KBO { bits = b,solver = solver})));mb = Worker (Matchbound { method = RFC,max_size = 100000});remove = First_Of ([ Worker (Weight { modus = mo})] <> ([ Seq [ qpi 2 4, qpi 3 4, qpi 4 4], Seq [ qpi 5 4, qpi 6 3, qpi 7 3]] <> ([ matrix Arctic 4 3, matrix Natural 4 3] <> [ kbo 1, And_Then (Worker Mirror) (kbo 1)])));remove_tile = Seq [ remove, tiling Overlap 3];dp = As_Transformer (Apply (And_Then (Worker (DP { tracing = False})) (Worker Remap)) (Apply wop (Branch (Worker (EDG { tracing = False})) remove_tile)));noh = [ Timeout 10 (Worker (Enumerate { closure = Forward})), Timeout 10 (Worker (Enumerate { closure = Backward}))];yeah = Tree_Search_Preemptive 0 done [ Worker (Weight { modus = mo}), mb, And_Then (Worker Mirror) mb, dp, And_Then (Worker Mirror) dp]}
49.32/12.56	in Apply (Worker Remap) (First_Of ([ yeah] <> noh))
49.75/12.67	EOF