NO

Solver Timeout: 4
Global Timeout: 60
No parsing errors!
Init Location: 0
Transitions:
<l0, l13, true>
<l1, l2, ((0 + got_SIGHUP^0) <= 0)>
<l1, l3, (1 <= (0 + got_SIGHUP^0)) /\ (undef18 = undef18) /\ (undef27 = (0 + undef18)) /\ (undef30 = (0 + undef27)), par{__rho_1_^0 -> undef18, a33^0 -> 1, got_SIGHUP^0 -> 0, ret_XLogArchivingActive44^0 -> undef27, tmp2^0 -> undef30, tt1^0 -> (0 + undef30)}>
<l4, l5, true>
<l6, l7, true>
<l8, l6, true>
<l9, l8, (((1 + curtime^0) + (~(1) * last_copy_time^0)) <= (0 + __const_1000^0))>
<l9, l8, ((0 + __const_1000^0) <= ((0 + curtime^0) + (~(1) * last_copy_time^0))), par{wakend^0 -> 1}>
<l10, l8, (1 <= (0 + wakend^0))>
<l10, l9, ((0 + wakend^0) <= 0) /\ (undef132 = undef132) /\ (undef141 = (0 + undef132)), par{__rho_3_^0 -> undef132, a77^0 -> 0, curtime^0 -> (0 + undef141), ret_time88^0 -> undef141}>
<l2, l10, ((0 + wakend^0) <= 0)>
<l2, l10, (1 <= (0 + wakend^0)) /\ (undef164 = undef164) /\ (undef172 = (0 + undef164)), par{__rho_3_^0 -> undef164, a55^0 -> 0, last_copy_time^0 -> (0 + undef172), ret_time66^0 -> undef172, wakend^0 -> 0}>
<l7, l11, true>
<l11, l7, true>
<l3, l2, (1 <= (0 + tt1^0))>
<l3, l6, ((0 + tt1^0) <= 0)>
<l12, l1, (undef243 = undef243) /\ (undef257 = 1), par{__rho_2_^0 -> undef243, got_SIGHUP^0 -> (0 + undef243), wakend^0 -> 1}>
<l13, l12, true>

Fresh variables:
undef18, undef27, undef30, undef132, undef141, undef164, undef172, undef243, undef257, 

Undef variables:
undef18, undef27, undef30, undef132, undef141, undef164, undef172, undef243, undef257, 

Abstraction variables:

Exit nodes:

Accepting locations:

Asserts:

Preprocessed LLVMGraph
Init Location: 0
Transitions:
<l0, l7, (undef243 = undef243) /\ (undef257 = 1) /\ ((0 + (0 + undef243)) <= 0) /\ (1 <= (0 + 1)) /\ (undef164 = undef164) /\ (undef172 = (0 + undef164)) /\ ((0 + 0) <= 0) /\ (undef132 = undef132) /\ (undef141 = (0 + undef132)) /\ (((1 + (0 + undef141)) + (~(1) * (0 + undef172))) <= (0 + __const_1000^0)), par{last_copy_time^0 -> (0 + undef172)}>
<l0, l7, (undef243 = undef243) /\ (undef257 = 1) /\ ((0 + (0 + undef243)) <= 0) /\ (1 <= (0 + 1)) /\ (undef164 = undef164) /\ (undef172 = (0 + undef164)) /\ ((0 + 0) <= 0) /\ (undef132 = undef132) /\ (undef141 = (0 + undef132)) /\ ((0 + __const_1000^0) <= ((0 + (0 + undef141)) + (~(1) * (0 + undef172)))), par{last_copy_time^0 -> (0 + undef172)}>
<l0, l7, (undef243 = undef243) /\ (undef257 = 1) /\ (1 <= (0 + (0 + undef243))) /\ (undef18 = undef18) /\ (undef27 = (0 + undef18)) /\ (undef30 = (0 + undef27)) /\ (1 <= (0 + (0 + undef30))) /\ (1 <= (0 + 1)) /\ (undef164 = undef164) /\ (undef172 = (0 + undef164)) /\ ((0 + 0) <= 0) /\ (undef132 = undef132) /\ (undef141 = (0 + undef132)) /\ (((1 + (0 + undef141)) + (~(1) * (0 + undef172))) <= (0 + __const_1000^0)), par{last_copy_time^0 -> (0 + undef172)}>
<l0, l7, (undef243 = undef243) /\ (undef257 = 1) /\ (1 <= (0 + (0 + undef243))) /\ (undef18 = undef18) /\ (undef27 = (0 + undef18)) /\ (undef30 = (0 + undef27)) /\ (1 <= (0 + (0 + undef30))) /\ (1 <= (0 + 1)) /\ (undef164 = undef164) /\ (undef172 = (0 + undef164)) /\ ((0 + 0) <= 0) /\ (undef132 = undef132) /\ (undef141 = (0 + undef132)) /\ ((0 + __const_1000^0) <= ((0 + (0 + undef141)) + (~(1) * (0 + undef172)))), par{last_copy_time^0 -> (0 + undef172)}>
<l0, l7, (undef243 = undef243) /\ (undef257 = 1) /\ (1 <= (0 + (0 + undef243))) /\ (undef18 = undef18) /\ (undef27 = (0 + undef18)) /\ (undef30 = (0 + undef27)) /\ ((0 + (0 + undef30)) <= 0)>
<l7, l7, true>

Fresh variables:
undef18, undef27, undef30, undef132, undef141, undef164, undef172, undef243, undef257, 

Undef variables:
undef18, undef27, undef30, undef132, undef141, undef164, undef172, undef243, undef257, 

Abstraction variables:

Exit nodes:

Accepting locations:

Asserts:

*************************************************************
*******************************************************************************************
***********************       WORKING TRANSITION SYSTEM (DAG)       ***********************
*******************************************************************************************

Init Location: 0
Graph 0:
Transitions:
Variables:

Graph 1:
Transitions:
<l7, l7, true, {all remain the same}>
Variables:

Precedence: 
Graph 0

Graph 1
<l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>

Map Locations to Subgraph:
( 0 , 0 )
( 7 , 1 )

*******************************************************************************************
********************************    CHECKING ASSERTIONS    ********************************
*******************************************************************************************

Proving termination of subgraph 0
Proving termination of subgraph 1
Checking unfeasibility...
Time used: 0.002628

> No variable changes in termination graph.
Checking conditional unfeasibility...
Termination failed. Trying to show unreachability...
Proving unreachability of entry: <l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>

LOG: CALL check - Post:1 <= 0 - Process 1
* Exit transition: <l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
* Postcondition  : 1 <= 0

LOG: CALL solveLinear

LOG: RETURN solveLinear - Elapsed time: 0.000615s
> Postcondition is not implied!

LOG: RETURN check - Elapsed time: 0.000740s
Cannot prove unreachability

Proving non-termination of subgraph 1
Transitions:
<l7, l7, true, {all remain the same}>
Variables:

Checking conditional non-termination of SCC {l7}...
> No exit transition to close.
Calling reachability with...
Transition: <l7, end, true, {all remain the same}>
Conditions: 
Transition: <l7, end, true, {all remain the same}>
Conditions: 
Transition: <l7, end, true, {all remain the same}>
Conditions: 
Transition: <l7, end, true, {all remain the same}>
Conditions: 
Transition: <l7, end, true, {all remain the same}>
Conditions: 
OPEN EXITS: 
<l7, end, true, {all remain the same}>
<l7, end, true, {all remain the same}>
<l7, end, true, {all remain the same}>
<l7, end, true, {all remain the same}>
<l7, end, true, {all remain the same}>

--- Reachability graph ---
> Graph without transitions.

Calling reachability with...
Transition: <l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
Conditions: 
Transition: <l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
Conditions: 
Transition: <l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
Conditions: 
Transition: <l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
Conditions: 
Transition: <l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
Conditions: 
Transition: <l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
Conditions: 
OPEN EXITS: 
<l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
<l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
<l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
<l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>
<l0, l7, undef243 <= 0 /\ 1 + undef141 <= __const_1000^0 + undef172 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ undef243 <= 0 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, 1 + undef141 <= __const_1000^0 + undef172 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, __const_1000^0 + undef172 <= undef141 /\ 1 <= undef30 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef132 = undef141 /\ undef164 = undef172 /\ undef257 = 1, {last_copy_time^0 -> undef172, rest remain the same}>
<l0, l7, undef30 <= 0 /\ 1 <= undef243 /\ undef18 = undef27 /\ undef27 = undef30 /\ undef257 = 1, {all remain the same}>

> Conditions are reachable!

Program does NOT terminate