NO Solver Timeout: 4 Global Timeout: 60 No parsing errors! Init Location: 0 Transitions: undef12, a22^0 -> 1, got_SIGHUP^0 -> 0, tt1^0 -> (0 + undef12)}> undef44}> 1}> undef86}> undef123, last_copy_time^0 -> (0 + undef123), wakend^0 -> 0}> undef151, got_SIGHUP^0 -> (0 + undef151), wakend^0 -> 1}> Fresh variables: undef12, undef44, undef86, undef123, undef151, undef161, Undef variables: undef12, undef44, undef86, undef123, undef151, undef161, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: (0 + undef123)}> (0 + undef123)}> (0 + undef123)}> (0 + undef123)}> Fresh variables: undef12, undef44, undef86, undef123, undef151, undef161, Undef variables: undef12, undef44, undef86, undef123, undef151, undef161, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: Variables: Precedence: Graph 0 Graph 1 undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 7 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.001771 > No variable changes in termination graph. Checking conditional unfeasibility... Termination failed. Trying to show unreachability... Proving unreachability of entry: undef123, rest remain the same}> LOG: CALL check - Post:1 <= 0 - Process 1 * Exit transition: undef123, rest remain the same}> * Postcondition : 1 <= 0 LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.000479s > Postcondition is not implied! LOG: RETURN check - Elapsed time: 0.000581s Cannot prove unreachability Proving non-termination of subgraph 1 Transitions: Variables: Checking conditional non-termination of SCC {l7}... > No exit transition to close. Calling reachability with... Transition: Conditions: Transition: Conditions: Transition: Conditions: Transition: Conditions: Transition: Conditions: OPEN EXITS: --- Reachability graph --- > Graph without transitions. Calling reachability with... Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: undef123, rest remain the same}> Conditions: Transition: Conditions: OPEN EXITS: undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> undef123, rest remain the same}> > Conditions are reachable! Program does NOT terminate