MAYBE proof of prog.inttrs # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty Termination of the given IRSwT could not be shown: (0) IRSwT (1) IRSFormatTransformerProof [EQUIVALENT, 0 ms] (2) IRSwT (3) IRSwTTerminationDigraphProof [EQUIVALENT, 971 ms] (4) AND (5) IRSwT (6) IntTRSCompressionProof [EQUIVALENT, 0 ms] (7) IRSwT (8) IntTRSUnneededArgumentFilterProof [EQUIVALENT, 0 ms] (9) IRSwT (10) TempFilterProof [SOUND, 34 ms] (11) IntTRS (12) PolynomialOrderProcessor [EQUIVALENT, 10 ms] (13) YES (14) IRSwT (15) IntTRSCompressionProof [EQUIVALENT, 0 ms] (16) IRSwT (17) TempFilterProof [SOUND, 676 ms] (18) IRSwT (19) IRSwTTerminationDigraphProof [EQUIVALENT, 58 ms] (20) IRSwT (21) IntTRSCompressionProof [EQUIVALENT, 0 ms] (22) IRSwT ---------------------------------------- (0) Obligation: Rules: f1_0_main_Load(arg1, arg2) -> f234_0_slide93_FieldAccess(arg1P, arg2P) :|: -1 <= x4 - 1 && 1 <= arg2 - 1 && -1 <= arg1P - 1 && arg2P <= x5 - 1 && -1 <= x5 - 1 && 0 <= arg1 - 1 f1_0_main_Load(x, x1) -> f234_0_slide93_FieldAccess(x2, x3) :|: -1 <= x6 - 1 && 1 <= x1 - 1 && x3 <= 0 && -1 <= x2 - 1 && 0 <= x - 1 f234_0_slide93_FieldAccess(x7, x8) -> f951_0_slide93_EQ(x9, x11) :|: 0 = x11 && x7 = x9 && 0 <= x8 - 1 f234_0_slide93_FieldAccess(x12, x13) -> f951_0_slide93_EQ(x14, x15) :|: 1 = x15 && x12 = x14 f951_0_slide93_EQ(x16, x17) -> f951_0_slide93_EQ'(x18, x19) :|: x16 - 2 * x20 = 0 && 0 <= x17 - 1 && x21 <= x17 - 1 && 0 <= x21 - 1 && x22 <= x16 && x16 = x18 && x17 = x19 f951_0_slide93_EQ'(x23, x24) -> f951_0_slide93_EQ(x26, x27) :|: x23 - 2 * x28 = 0 && 0 <= x24 - 1 && x30 <= x24 - 1 && x26 <= x23 && 0 <= x30 - 1 && 0 <= x23 - 2 * x28 && x23 - 2 * x28 <= 1 && x23 - 2 * x26 <= 1 && 0 <= x23 - 2 * x26 && 0 = x27 f951_0_slide93_EQ(x31, x32) -> f951_0_slide93_EQ'(x35, x37) :|: x31 - 2 * x38 = 1 && 0 <= x32 - 1 && x39 <= x32 - 1 && 0 <= x39 - 1 && x42 <= x31 && x31 = x35 && x32 = x37 f951_0_slide93_EQ'(x43, x47) -> f951_0_slide93_EQ(x48, x49) :|: x43 - 2 * x52 = 1 && 0 <= x47 - 1 && x53 <= x47 - 1 && x48 <= x43 && 0 <= x53 - 1 && 0 <= x43 - 2 * x52 && x43 - 2 * x52 <= 1 && x43 - 2 * x48 <= 1 && 0 <= x43 - 2 * x48 && 1 = x49 f951_0_slide93_EQ(x57, x58) -> f951_0_slide93_EQ'(x59, x62) :|: x57 - 2 * x63 = 1 && 0 <= x58 - 1 && x67 <= x58 - 1 && x68 <= x57 && x57 = x59 && x58 = x62 f951_0_slide93_EQ'(x69, x72) -> f951_0_slide93_EQ(x73, x74) :|: x69 - 2 * x75 = 1 && 0 <= x72 - 1 && x73 <= x69 && x76 <= x72 - 1 && 0 <= x69 - 2 * x75 && x69 - 2 * x75 <= 1 && x69 - 2 * x73 <= 1 && 0 <= x69 - 2 * x73 && 1 = x74 f951_0_slide93_EQ(x77, x78) -> f951_0_slide93_EQ'(x79, x80) :|: x77 - 2 * x81 = 0 && 0 <= x78 - 1 && x82 <= x78 - 1 && x83 <= x77 && x77 = x79 && x78 = x80 f951_0_slide93_EQ'(x84, x85) -> f951_0_slide93_EQ(x86, x87) :|: x84 - 2 * x88 = 0 && 0 <= x85 - 1 && x86 <= x84 && x89 <= x85 - 1 && 0 <= x84 - 2 * x88 && x84 - 2 * x88 <= 1 && x84 - 2 * x86 <= 1 && 0 <= x84 - 2 * x86 && 1 = x87 f1_0_main_Load(x90, x91) -> f196_0_create_LE(x92, x93) :|: -1 <= x94 - 1 && 1 <= x91 - 1 && -1 <= x95 - 1 && 0 <= x90 - 1 && x95 - 1 = x92 f196_0_create_LE(x96, x97) -> f196_0_create_LE(x98, x99) :|: x96 - 1 = x98 && 0 <= x96 - 1 __init(x100, x101) -> f1_0_main_Load(x102, x103) :|: 0 <= 0 Start term: __init(arg1, arg2) ---------------------------------------- (1) IRSFormatTransformerProof (EQUIVALENT) Reformatted IRS to match normalized format (transformed away non-linear left-hand sides, !=, / and %). ---------------------------------------- (2) Obligation: Rules: f1_0_main_Load(arg1, arg2) -> f234_0_slide93_FieldAccess(arg1P, arg2P) :|: -1 <= x4 - 1 && 1 <= arg2 - 1 && -1 <= arg1P - 1 && arg2P <= x5 - 1 && -1 <= x5 - 1 && 0 <= arg1 - 1 f1_0_main_Load(x, x1) -> f234_0_slide93_FieldAccess(x2, x3) :|: -1 <= x6 - 1 && 1 <= x1 - 1 && x3 <= 0 && -1 <= x2 - 1 && 0 <= x - 1 f234_0_slide93_FieldAccess(x7, x8) -> f951_0_slide93_EQ(x9, x11) :|: 0 = x11 && x7 = x9 && 0 <= x8 - 1 f234_0_slide93_FieldAccess(x12, x13) -> f951_0_slide93_EQ(x14, x15) :|: 1 = x15 && x12 = x14 f951_0_slide93_EQ(x16, x17) -> f951_0_slide93_EQ'(x18, x19) :|: x16 - 2 * x20 = 0 && 0 <= x17 - 1 && x21 <= x17 - 1 && 0 <= x21 - 1 && x22 <= x16 && x16 = x18 && x17 = x19 f951_0_slide93_EQ'(x23, x24) -> f951_0_slide93_EQ(x26, x27) :|: x23 - 2 * x28 = 0 && 0 <= x24 - 1 && x30 <= x24 - 1 && x26 <= x23 && 0 <= x30 - 1 && 0 <= x23 - 2 * x28 && x23 - 2 * x28 <= 1 && x23 - 2 * x26 <= 1 && 0 <= x23 - 2 * x26 && 0 = x27 f951_0_slide93_EQ(x31, x32) -> f951_0_slide93_EQ'(x35, x37) :|: x31 - 2 * x38 = 1 && 0 <= x32 - 1 && x39 <= x32 - 1 && 0 <= x39 - 1 && x42 <= x31 && x31 = x35 && x32 = x37 f951_0_slide93_EQ'(x43, x47) -> f951_0_slide93_EQ(x48, x49) :|: x43 - 2 * x52 = 1 && 0 <= x47 - 1 && x53 <= x47 - 1 && x48 <= x43 && 0 <= x53 - 1 && 0 <= x43 - 2 * x52 && x43 - 2 * x52 <= 1 && x43 - 2 * x48 <= 1 && 0 <= x43 - 2 * x48 && 1 = x49 f951_0_slide93_EQ(x57, x58) -> f951_0_slide93_EQ'(x59, x62) :|: x57 - 2 * x63 = 1 && 0 <= x58 - 1 && x67 <= x58 - 1 && x68 <= x57 && x57 = x59 && x58 = x62 f951_0_slide93_EQ'(x69, x72) -> f951_0_slide93_EQ(x73, x74) :|: x69 - 2 * x75 = 1 && 0 <= x72 - 1 && x73 <= x69 && x76 <= x72 - 1 && 0 <= x69 - 2 * x75 && x69 - 2 * x75 <= 1 && x69 - 2 * x73 <= 1 && 0 <= x69 - 2 * x73 && 1 = x74 f951_0_slide93_EQ(x77, x78) -> f951_0_slide93_EQ'(x79, x80) :|: x77 - 2 * x81 = 0 && 0 <= x78 - 1 && x82 <= x78 - 1 && x83 <= x77 && x77 = x79 && x78 = x80 f951_0_slide93_EQ'(x84, x85) -> f951_0_slide93_EQ(x86, x87) :|: x84 - 2 * x88 = 0 && 0 <= x85 - 1 && x86 <= x84 && x89 <= x85 - 1 && 0 <= x84 - 2 * x88 && x84 - 2 * x88 <= 1 && x84 - 2 * x86 <= 1 && 0 <= x84 - 2 * x86 && 1 = x87 f1_0_main_Load(x90, x91) -> f196_0_create_LE(x92, x93) :|: -1 <= x94 - 1 && 1 <= x91 - 1 && -1 <= x95 - 1 && 0 <= x90 - 1 && x95 - 1 = x92 f196_0_create_LE(x96, x97) -> f196_0_create_LE(x98, x99) :|: x96 - 1 = x98 && 0 <= x96 - 1 __init(x100, x101) -> f1_0_main_Load(x102, x103) :|: 0 <= 0 Start term: __init(arg1, arg2) ---------------------------------------- (3) IRSwTTerminationDigraphProof (EQUIVALENT) Constructed termination digraph! Nodes: (1) f1_0_main_Load(arg1, arg2) -> f234_0_slide93_FieldAccess(arg1P, arg2P) :|: -1 <= x4 - 1 && 1 <= arg2 - 1 && -1 <= arg1P - 1 && arg2P <= x5 - 1 && -1 <= x5 - 1 && 0 <= arg1 - 1 (2) f1_0_main_Load(x, x1) -> f234_0_slide93_FieldAccess(x2, x3) :|: -1 <= x6 - 1 && 1 <= x1 - 1 && x3 <= 0 && -1 <= x2 - 1 && 0 <= x - 1 (3) f234_0_slide93_FieldAccess(x7, x8) -> f951_0_slide93_EQ(x9, x11) :|: 0 = x11 && x7 = x9 && 0 <= x8 - 1 (4) f234_0_slide93_FieldAccess(x12, x13) -> f951_0_slide93_EQ(x14, x15) :|: 1 = x15 && x12 = x14 (5) f951_0_slide93_EQ(x16, x17) -> f951_0_slide93_EQ'(x18, x19) :|: x16 - 2 * x20 = 0 && 0 <= x17 - 1 && x21 <= x17 - 1 && 0 <= x21 - 1 && x22 <= x16 && x16 = x18 && x17 = x19 (6) f951_0_slide93_EQ'(x23, x24) -> f951_0_slide93_EQ(x26, x27) :|: x23 - 2 * x28 = 0 && 0 <= x24 - 1 && x30 <= x24 - 1 && x26 <= x23 && 0 <= x30 - 1 && 0 <= x23 - 2 * x28 && x23 - 2 * x28 <= 1 && x23 - 2 * x26 <= 1 && 0 <= x23 - 2 * x26 && 0 = x27 (7) f951_0_slide93_EQ(x31, x32) -> f951_0_slide93_EQ'(x35, x37) :|: x31 - 2 * x38 = 1 && 0 <= x32 - 1 && x39 <= x32 - 1 && 0 <= x39 - 1 && x42 <= x31 && x31 = x35 && x32 = x37 (8) f951_0_slide93_EQ'(x43, x47) -> f951_0_slide93_EQ(x48, x49) :|: x43 - 2 * x52 = 1 && 0 <= x47 - 1 && x53 <= x47 - 1 && x48 <= x43 && 0 <= x53 - 1 && 0 <= x43 - 2 * x52 && x43 - 2 * x52 <= 1 && x43 - 2 * x48 <= 1 && 0 <= x43 - 2 * x48 && 1 = x49 (9) f951_0_slide93_EQ(x57, x58) -> f951_0_slide93_EQ'(x59, x62) :|: x57 - 2 * x63 = 1 && 0 <= x58 - 1 && x67 <= x58 - 1 && x68 <= x57 && x57 = x59 && x58 = x62 (10) f951_0_slide93_EQ'(x69, x72) -> f951_0_slide93_EQ(x73, x74) :|: x69 - 2 * x75 = 1 && 0 <= x72 - 1 && x73 <= x69 && x76 <= x72 - 1 && 0 <= x69 - 2 * x75 && x69 - 2 * x75 <= 1 && x69 - 2 * x73 <= 1 && 0 <= x69 - 2 * x73 && 1 = x74 (11) f951_0_slide93_EQ(x77, x78) -> f951_0_slide93_EQ'(x79, x80) :|: x77 - 2 * x81 = 0 && 0 <= x78 - 1 && x82 <= x78 - 1 && x83 <= x77 && x77 = x79 && x78 = x80 (12) f951_0_slide93_EQ'(x84, x85) -> f951_0_slide93_EQ(x86, x87) :|: x84 - 2 * x88 = 0 && 0 <= x85 - 1 && x86 <= x84 && x89 <= x85 - 1 && 0 <= x84 - 2 * x88 && x84 - 2 * x88 <= 1 && x84 - 2 * x86 <= 1 && 0 <= x84 - 2 * x86 && 1 = x87 (13) f1_0_main_Load(x90, x91) -> f196_0_create_LE(x92, x93) :|: -1 <= x94 - 1 && 1 <= x91 - 1 && -1 <= x95 - 1 && 0 <= x90 - 1 && x95 - 1 = x92 (14) f196_0_create_LE(x96, x97) -> f196_0_create_LE(x98, x99) :|: x96 - 1 = x98 && 0 <= x96 - 1 (15) __init(x100, x101) -> f1_0_main_Load(x102, x103) :|: 0 <= 0 Arcs: (1) -> (3), (4) (2) -> (4) (4) -> (9), (11) (5) -> (6), (12) (7) -> (8), (10) (8) -> (9), (11) (9) -> (8), (10) (10) -> (9), (11) (11) -> (6), (12) (12) -> (9), (11) (13) -> (14) (14) -> (14) (15) -> (1), (2), (13) This digraph is fully evaluated! ---------------------------------------- (4) Complex Obligation (AND) ---------------------------------------- (5) Obligation: Termination digraph: Nodes: (1) f196_0_create_LE(x96, x97) -> f196_0_create_LE(x98, x99) :|: x96 - 1 = x98 && 0 <= x96 - 1 Arcs: (1) -> (1) This digraph is fully evaluated! ---------------------------------------- (6) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (7) Obligation: Rules: f196_0_create_LE(x96:0, x97:0) -> f196_0_create_LE(x96:0 - 1, x99:0) :|: x96:0 > 0 ---------------------------------------- (8) IntTRSUnneededArgumentFilterProof (EQUIVALENT) Some arguments are removed because they cannot influence termination. We removed arguments according to the following replacements: f196_0_create_LE(x1, x2) -> f196_0_create_LE(x1) ---------------------------------------- (9) Obligation: Rules: f196_0_create_LE(x96:0) -> f196_0_create_LE(x96:0 - 1) :|: x96:0 > 0 ---------------------------------------- (10) TempFilterProof (SOUND) Used the following sort dictionary for filtering: f196_0_create_LE(INTEGER) Replaced non-predefined constructor symbols by 0. ---------------------------------------- (11) Obligation: Rules: f196_0_create_LE(x96:0) -> f196_0_create_LE(c) :|: c = x96:0 - 1 && x96:0 > 0 ---------------------------------------- (12) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f196_0_create_LE(x)] = x The following rules are decreasing: f196_0_create_LE(x96:0) -> f196_0_create_LE(c) :|: c = x96:0 - 1 && x96:0 > 0 The following rules are bounded: f196_0_create_LE(x96:0) -> f196_0_create_LE(c) :|: c = x96:0 - 1 && x96:0 > 0 ---------------------------------------- (13) YES ---------------------------------------- (14) Obligation: Termination digraph: Nodes: (1) f951_0_slide93_EQ(x57, x58) -> f951_0_slide93_EQ'(x59, x62) :|: x57 - 2 * x63 = 1 && 0 <= x58 - 1 && x67 <= x58 - 1 && x68 <= x57 && x57 = x59 && x58 = x62 (2) f951_0_slide93_EQ'(x84, x85) -> f951_0_slide93_EQ(x86, x87) :|: x84 - 2 * x88 = 0 && 0 <= x85 - 1 && x86 <= x84 && x89 <= x85 - 1 && 0 <= x84 - 2 * x88 && x84 - 2 * x88 <= 1 && x84 - 2 * x86 <= 1 && 0 <= x84 - 2 * x86 && 1 = x87 (3) f951_0_slide93_EQ(x77, x78) -> f951_0_slide93_EQ'(x79, x80) :|: x77 - 2 * x81 = 0 && 0 <= x78 - 1 && x82 <= x78 - 1 && x83 <= x77 && x77 = x79 && x78 = x80 (4) f951_0_slide93_EQ'(x69, x72) -> f951_0_slide93_EQ(x73, x74) :|: x69 - 2 * x75 = 1 && 0 <= x72 - 1 && x73 <= x69 && x76 <= x72 - 1 && 0 <= x69 - 2 * x75 && x69 - 2 * x75 <= 1 && x69 - 2 * x73 <= 1 && 0 <= x69 - 2 * x73 && 1 = x74 (5) f951_0_slide93_EQ'(x43, x47) -> f951_0_slide93_EQ(x48, x49) :|: x43 - 2 * x52 = 1 && 0 <= x47 - 1 && x53 <= x47 - 1 && x48 <= x43 && 0 <= x53 - 1 && 0 <= x43 - 2 * x52 && x43 - 2 * x52 <= 1 && x43 - 2 * x48 <= 1 && 0 <= x43 - 2 * x48 && 1 = x49 Arcs: (1) -> (4), (5) (2) -> (1), (3) (3) -> (2) (4) -> (1), (3) (5) -> (1), (3) This digraph is fully evaluated! ---------------------------------------- (15) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (16) Obligation: Rules: f951_0_slide93_EQ'(x43:0, x47:0) -> f951_0_slide93_EQ(x48:0, 1) :|: x43:0 - 2 * x48:0 <= 1 && x43:0 - 2 * x48:0 >= 0 && x43:0 - 2 * x52:0 <= 1 && x43:0 - 2 * x52:0 >= 0 && x53:0 > 0 && x48:0 <= x43:0 && x53:0 <= x47:0 - 1 && x47:0 > 0 && x43:0 - 2 * x52:0 = 1 f951_0_slide93_EQ'(x84:0, x85:0) -> f951_0_slide93_EQ(x86:0, 1) :|: x84:0 - 2 * x86:0 <= 1 && x84:0 - 2 * x86:0 >= 0 && x84:0 - 2 * x88:0 <= 1 && x84:0 - 2 * x88:0 >= 0 && x89:0 <= x85:0 - 1 && x86:0 <= x84:0 && x85:0 > 0 && x84:0 - 2 * x88:0 = 0 f951_0_slide93_EQ(x77:0, x78:0) -> f951_0_slide93_EQ'(x77:0, x78:0) :|: x82:0 <= x78:0 - 1 && x83:0 <= x77:0 && x78:0 > 0 && x77:0 - 2 * x81:0 = 0 f951_0_slide93_EQ'(x69:0, x72:0) -> f951_0_slide93_EQ(x73:0, 1) :|: x69:0 - 2 * x73:0 <= 1 && x69:0 - 2 * x73:0 >= 0 && x69:0 - 2 * x75:0 <= 1 && x69:0 - 2 * x75:0 >= 0 && x76:0 <= x72:0 - 1 && x73:0 <= x69:0 && x72:0 > 0 && x69:0 - 2 * x75:0 = 1 f951_0_slide93_EQ(x57:0, x58:0) -> f951_0_slide93_EQ'(x57:0, x58:0) :|: x67:0 <= x58:0 - 1 && x68:0 <= x57:0 && x58:0 > 0 && x57:0 - 2 * x63:0 = 1 ---------------------------------------- (17) TempFilterProof (SOUND) Used the following sort dictionary for filtering: f951_0_slide93_EQ'(INTEGER, INTEGER) f951_0_slide93_EQ(INTEGER, VARIABLE) Replaced non-predefined constructor symbols by 0.The following proof was generated: # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty Termination of the given IntTRS could not be shown: - IntTRS - RankingReductionPairProof Rules: f951_0_slide93_EQ'(x43:0, x47:0) -> f951_0_slide93_EQ(x48:0, c) :|: c = 1 && (x43:0 - 2 * x48:0 <= 1 && x43:0 - 2 * x48:0 >= 0 && x43:0 - 2 * x52:0 <= 1 && x43:0 - 2 * x52:0 >= 0 && x53:0 > 0 && x48:0 <= x43:0 && x53:0 <= x47:0 - 1 && x47:0 > 0 && x43:0 - 2 * x52:0 = 1) f951_0_slide93_EQ'(x84:0, x85:0) -> f951_0_slide93_EQ(x86:0, c1) :|: c1 = 1 && (x84:0 - 2 * x86:0 <= 1 && x84:0 - 2 * x86:0 >= 0 && x84:0 - 2 * x88:0 <= 1 && x84:0 - 2 * x88:0 >= 0 && x89:0 <= x85:0 - 1 && x86:0 <= x84:0 && x85:0 > 0 && x84:0 - 2 * x88:0 = 0) f951_0_slide93_EQ(x77:0, x78:0) -> f951_0_slide93_EQ'(x77:0, x78:0) :|: x82:0 <= x78:0 - 1 && x83:0 <= x77:0 && x78:0 > 0 && x77:0 - 2 * x81:0 = 0 f951_0_slide93_EQ'(x69:0, x72:0) -> f951_0_slide93_EQ(x73:0, c2) :|: c2 = 1 && (x69:0 - 2 * x73:0 <= 1 && x69:0 - 2 * x73:0 >= 0 && x69:0 - 2 * x75:0 <= 1 && x69:0 - 2 * x75:0 >= 0 && x76:0 <= x72:0 - 1 && x73:0 <= x69:0 && x72:0 > 0 && x69:0 - 2 * x75:0 = 1) f951_0_slide93_EQ(x57:0, x58:0) -> f951_0_slide93_EQ'(x57:0, x58:0) :|: x67:0 <= x58:0 - 1 && x68:0 <= x57:0 && x58:0 > 0 && x57:0 - 2 * x63:0 = 1 Interpretation: [ f951_0_slide93_EQ' ] = f951_0_slide93_EQ'_2 [ f951_0_slide93_EQ ] = f951_0_slide93_EQ_2 The following rules are decreasing: f951_0_slide93_EQ'(x43:0, x47:0) -> f951_0_slide93_EQ(x48:0, c) :|: c = 1 && (x43:0 - 2 * x48:0 <= 1 && x43:0 - 2 * x48:0 >= 0 && x43:0 - 2 * x52:0 <= 1 && x43:0 - 2 * x52:0 >= 0 && x53:0 > 0 && x48:0 <= x43:0 && x53:0 <= x47:0 - 1 && x47:0 > 0 && x43:0 - 2 * x52:0 = 1) The following rules are bounded: f951_0_slide93_EQ'(x43:0, x47:0) -> f951_0_slide93_EQ(x48:0, c) :|: c = 1 && (x43:0 - 2 * x48:0 <= 1 && x43:0 - 2 * x48:0 >= 0 && x43:0 - 2 * x52:0 <= 1 && x43:0 - 2 * x52:0 >= 0 && x53:0 > 0 && x48:0 <= x43:0 && x53:0 <= x47:0 - 1 && x47:0 > 0 && x43:0 - 2 * x52:0 = 1) f951_0_slide93_EQ'(x84:0, x85:0) -> f951_0_slide93_EQ(x86:0, c1) :|: c1 = 1 && (x84:0 - 2 * x86:0 <= 1 && x84:0 - 2 * x86:0 >= 0 && x84:0 - 2 * x88:0 <= 1 && x84:0 - 2 * x88:0 >= 0 && x89:0 <= x85:0 - 1 && x86:0 <= x84:0 && x85:0 > 0 && x84:0 - 2 * x88:0 = 0) f951_0_slide93_EQ(x77:0, x78:0) -> f951_0_slide93_EQ'(x77:0, x78:0) :|: x82:0 <= x78:0 - 1 && x83:0 <= x77:0 && x78:0 > 0 && x77:0 - 2 * x81:0 = 0 f951_0_slide93_EQ'(x69:0, x72:0) -> f951_0_slide93_EQ(x73:0, c2) :|: c2 = 1 && (x69:0 - 2 * x73:0 <= 1 && x69:0 - 2 * x73:0 >= 0 && x69:0 - 2 * x75:0 <= 1 && x69:0 - 2 * x75:0 >= 0 && x76:0 <= x72:0 - 1 && x73:0 <= x69:0 && x72:0 > 0 && x69:0 - 2 * x75:0 = 1) f951_0_slide93_EQ(x57:0, x58:0) -> f951_0_slide93_EQ'(x57:0, x58:0) :|: x67:0 <= x58:0 - 1 && x68:0 <= x57:0 && x58:0 > 0 && x57:0 - 2 * x63:0 = 1 - IntTRS - RankingReductionPairProof - IntTRS Rules: f951_0_slide93_EQ'(x84:0, x85:0) -> f951_0_slide93_EQ(x86:0, c1) :|: c1 = 1 && (x84:0 - 2 * x86:0 <= 1 && x84:0 - 2 * x86:0 >= 0 && x84:0 - 2 * x88:0 <= 1 && x84:0 - 2 * x88:0 >= 0 && x89:0 <= x85:0 - 1 && x86:0 <= x84:0 && x85:0 > 0 && x84:0 - 2 * x88:0 = 0) f951_0_slide93_EQ(x77:0, x78:0) -> f951_0_slide93_EQ'(x77:0, x78:0) :|: x82:0 <= x78:0 - 1 && x83:0 <= x77:0 && x78:0 > 0 && x77:0 - 2 * x81:0 = 0 f951_0_slide93_EQ'(x69:0, x72:0) -> f951_0_slide93_EQ(x73:0, c2) :|: c2 = 1 && (x69:0 - 2 * x73:0 <= 1 && x69:0 - 2 * x73:0 >= 0 && x69:0 - 2 * x75:0 <= 1 && x69:0 - 2 * x75:0 >= 0 && x76:0 <= x72:0 - 1 && x73:0 <= x69:0 && x72:0 > 0 && x69:0 - 2 * x75:0 = 1) f951_0_slide93_EQ(x57:0, x58:0) -> f951_0_slide93_EQ'(x57:0, x58:0) :|: x67:0 <= x58:0 - 1 && x68:0 <= x57:0 && x58:0 > 0 && x57:0 - 2 * x63:0 = 1 ---------------------------------------- (18) Obligation: Rules: f951_0_slide93_EQ'(x84:0, x85:0) -> f951_0_slide93_EQ(x86:0, 1) :|: x84:0 - 2 * x86:0 <= 1 && x84:0 - 2 * x86:0 >= 0 && x84:0 - 2 * x88:0 <= 1 && x84:0 - 2 * x88:0 >= 0 && x89:0 <= x85:0 - 1 && x86:0 <= x84:0 && x85:0 > 0 && x84:0 - 2 * x88:0 = 0 f951_0_slide93_EQ(x77:0, x78:0) -> f951_0_slide93_EQ'(x77:0, x78:0) :|: x82:0 <= x78:0 - 1 && x83:0 <= x77:0 && x78:0 > 0 && x77:0 - 2 * x81:0 = 0 f951_0_slide93_EQ'(x69:0, x72:0) -> f951_0_slide93_EQ(x73:0, 1) :|: x69:0 - 2 * x73:0 <= 1 && x69:0 - 2 * x73:0 >= 0 && x69:0 - 2 * x75:0 <= 1 && x69:0 - 2 * x75:0 >= 0 && x76:0 <= x72:0 - 1 && x73:0 <= x69:0 && x72:0 > 0 && x69:0 - 2 * x75:0 = 1 f951_0_slide93_EQ(x57:0, x58:0) -> f951_0_slide93_EQ'(x57:0, x58:0) :|: x67:0 <= x58:0 - 1 && x68:0 <= x57:0 && x58:0 > 0 && x57:0 - 2 * x63:0 = 1 ---------------------------------------- (19) IRSwTTerminationDigraphProof (EQUIVALENT) Constructed termination digraph! Nodes: (1) f951_0_slide93_EQ'(x84:0, x85:0) -> f951_0_slide93_EQ(x86:0, 1) :|: x84:0 - 2 * x86:0 <= 1 && x84:0 - 2 * x86:0 >= 0 && x84:0 - 2 * x88:0 <= 1 && x84:0 - 2 * x88:0 >= 0 && x89:0 <= x85:0 - 1 && x86:0 <= x84:0 && x85:0 > 0 && x84:0 - 2 * x88:0 = 0 (2) f951_0_slide93_EQ(x77:0, x78:0) -> f951_0_slide93_EQ'(x77:0, x78:0) :|: x82:0 <= x78:0 - 1 && x83:0 <= x77:0 && x78:0 > 0 && x77:0 - 2 * x81:0 = 0 (3) f951_0_slide93_EQ'(x69:0, x72:0) -> f951_0_slide93_EQ(x73:0, 1) :|: x69:0 - 2 * x73:0 <= 1 && x69:0 - 2 * x73:0 >= 0 && x69:0 - 2 * x75:0 <= 1 && x69:0 - 2 * x75:0 >= 0 && x76:0 <= x72:0 - 1 && x73:0 <= x69:0 && x72:0 > 0 && x69:0 - 2 * x75:0 = 1 (4) f951_0_slide93_EQ(x57:0, x58:0) -> f951_0_slide93_EQ'(x57:0, x58:0) :|: x67:0 <= x58:0 - 1 && x68:0 <= x57:0 && x58:0 > 0 && x57:0 - 2 * x63:0 = 1 Arcs: (1) -> (2), (4) (2) -> (1) (3) -> (2), (4) (4) -> (3) This digraph is fully evaluated! ---------------------------------------- (20) Obligation: Termination digraph: Nodes: (1) f951_0_slide93_EQ'(x84:0, x85:0) -> f951_0_slide93_EQ(x86:0, 1) :|: x84:0 - 2 * x86:0 <= 1 && x84:0 - 2 * x86:0 >= 0 && x84:0 - 2 * x88:0 <= 1 && x84:0 - 2 * x88:0 >= 0 && x89:0 <= x85:0 - 1 && x86:0 <= x84:0 && x85:0 > 0 && x84:0 - 2 * x88:0 = 0 (2) f951_0_slide93_EQ(x77:0, x78:0) -> f951_0_slide93_EQ'(x77:0, x78:0) :|: x82:0 <= x78:0 - 1 && x83:0 <= x77:0 && x78:0 > 0 && x77:0 - 2 * x81:0 = 0 (3) f951_0_slide93_EQ'(x69:0, x72:0) -> f951_0_slide93_EQ(x73:0, 1) :|: x69:0 - 2 * x73:0 <= 1 && x69:0 - 2 * x73:0 >= 0 && x69:0 - 2 * x75:0 <= 1 && x69:0 - 2 * x75:0 >= 0 && x76:0 <= x72:0 - 1 && x73:0 <= x69:0 && x72:0 > 0 && x69:0 - 2 * x75:0 = 1 (4) f951_0_slide93_EQ(x57:0, x58:0) -> f951_0_slide93_EQ'(x57:0, x58:0) :|: x67:0 <= x58:0 - 1 && x68:0 <= x57:0 && x58:0 > 0 && x57:0 - 2 * x63:0 = 1 Arcs: (1) -> (2), (4) (2) -> (1) (3) -> (2), (4) (4) -> (3) This digraph is fully evaluated! ---------------------------------------- (21) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (22) Obligation: Rules: f951_0_slide93_EQ(x57:0:0, x58:0:0) -> f951_0_slide93_EQ'(x57:0:0, x58:0:0) :|: x58:0:0 > 0 && x57:0:0 - 2 * x63:0:0 = 1 && x68:0:0 <= x57:0:0 && x67:0:0 <= x58:0:0 - 1 f951_0_slide93_EQ'(x84:0:0, x85:0:0) -> f951_0_slide93_EQ(x86:0:0, 1) :|: x85:0:0 > 0 && x84:0:0 - 2 * x88:0:0 = 0 && x86:0:0 <= x84:0:0 && x89:0:0 <= x85:0:0 - 1 && x84:0:0 - 2 * x88:0:0 >= 0 && x84:0:0 - 2 * x88:0:0 <= 1 && x84:0:0 - 2 * x86:0:0 >= 0 && x84:0:0 - 2 * x86:0:0 <= 1 f951_0_slide93_EQ(x77:0:0, x78:0:0) -> f951_0_slide93_EQ'(x77:0:0, x78:0:0) :|: x78:0:0 > 0 && x77:0:0 - 2 * x81:0:0 = 0 && x83:0:0 <= x77:0:0 && x82:0:0 <= x78:0:0 - 1 f951_0_slide93_EQ'(x69:0:0, x72:0:0) -> f951_0_slide93_EQ(x73:0:0, 1) :|: x72:0:0 > 0 && x69:0:0 - 2 * x75:0:0 = 1 && x73:0:0 <= x69:0:0 && x76:0:0 <= x72:0:0 - 1 && x69:0:0 - 2 * x75:0:0 >= 0 && x69:0:0 - 2 * x75:0:0 <= 1 && x69:0:0 - 2 * x73:0:0 >= 0 && x69:0:0 - 2 * x73:0:0 <= 1