YES proof of prog.inttrs # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty Termination of the given IRSwT could be proven: (0) IRSwT (1) IRSFormatTransformerProof [EQUIVALENT, 0 ms] (2) IRSwT (3) IRSwTTerminationDigraphProof [EQUIVALENT, 359 ms] (4) IRSwT (5) IntTRSCompressionProof [EQUIVALENT, 17 ms] (6) IRSwT (7) FilterProof [EQUIVALENT, 0 ms] (8) IntTRS (9) IntTRSCompressionProof [EQUIVALENT, 0 ms] (10) IntTRS (11) RankingReductionPairProof [EQUIVALENT, 22 ms] (12) YES ---------------------------------------- (0) Obligation: Rules: f1_0_main_Load(arg1, arg2, arg3) -> f96_0_random_GT(arg1P, arg2P, arg3P) :|: 0 = arg2P && 0 <= arg1P - 1 && 0 <= arg1 - 1 && 0 <= arg2 - 1 && arg1P <= arg1 f1_0_main_Load(x, x1, x2) -> f96_0_random_GT(x3, x4, x5) :|: 0 <= x3 - 1 && 0 <= x - 1 && x3 <= x && 0 <= x1 - 1 && -1 <= x4 - 1 f96_0_random_GT(x6, x8, x9) -> f154_0_main_InvokeMethod(x10, x12, x13) :|: x10 <= x6 && 1 <= x14 - 1 && 0 <= x6 - 1 && 0 <= x10 - 1 && x8 = x12 && 0 = x13 f96_0_random_GT(x15, x16, x17) -> f154_0_main_InvokeMethod(x18, x20, x21) :|: 1 <= x22 - 1 && -1 <= x21 - 1 && x18 <= x15 && 0 <= x15 - 1 && 0 <= x18 - 1 && x16 = x20 f1_0_main_Load(x23, x24, x25) -> f167_0_log_LT(x26, x27, x29) :|: 0 = x29 && 0 = x27 && 0 = x26 && 0 = x24 && 0 <= x23 - 1 f96_0_random_GT(x30, x31, x32) -> f167_0_log_LT(x33, x34, x35) :|: 0 = x35 && x31 = x34 && 0 = x33 && 0 <= x30 - 1 f154_0_main_InvokeMethod(x36, x37, x38) -> f167_0_log_LT(x39, x40, x41) :|: 0 <= x36 - 1 && 1 <= x42 - 1 && x38 = x39 && x37 = x40 && x38 = x41 f167_0_log_LT(x43, x44, x45) -> f167_0_log_LT'(x46, x47, x48) :|: 1 <= x44 - 1 && 1 <= x43 - 1 && x49 <= x44 - 1 && x43 <= x44 && x43 = x45 && x43 = x46 && x44 = x47 && x43 = x48 f167_0_log_LT'(x50, x51, x52) -> f167_0_log_LT(x53, x54, x55) :|: x50 = x55 && x50 = x53 && x50 = x52 && 0 <= x51 - x50 * x54 && x51 - x50 * x54 <= x50 - 1 && x54 <= x51 - 1 && x50 <= x51 && 1 <= x50 - 1 && 1 <= x51 - 1 __init(x56, x57, x58) -> f1_0_main_Load(x59, x60, x61) :|: 0 <= 0 Start term: __init(arg1, arg2, arg3) ---------------------------------------- (1) IRSFormatTransformerProof (EQUIVALENT) Reformatted IRS to match normalized format (transformed away non-linear left-hand sides, !=, / and %). ---------------------------------------- (2) Obligation: Rules: f1_0_main_Load(arg1, arg2, arg3) -> f96_0_random_GT(arg1P, arg2P, arg3P) :|: 0 = arg2P && 0 <= arg1P - 1 && 0 <= arg1 - 1 && 0 <= arg2 - 1 && arg1P <= arg1 f1_0_main_Load(x, x1, x2) -> f96_0_random_GT(x3, x4, x5) :|: 0 <= x3 - 1 && 0 <= x - 1 && x3 <= x && 0 <= x1 - 1 && -1 <= x4 - 1 f96_0_random_GT(x6, x8, x9) -> f154_0_main_InvokeMethod(x10, x12, x13) :|: x10 <= x6 && 1 <= x14 - 1 && 0 <= x6 - 1 && 0 <= x10 - 1 && x8 = x12 && 0 = x13 f96_0_random_GT(x15, x16, x17) -> f154_0_main_InvokeMethod(x18, x20, x21) :|: 1 <= x22 - 1 && -1 <= x21 - 1 && x18 <= x15 && 0 <= x15 - 1 && 0 <= x18 - 1 && x16 = x20 f1_0_main_Load(x23, x24, x25) -> f167_0_log_LT(x26, x27, x29) :|: 0 = x29 && 0 = x27 && 0 = x26 && 0 = x24 && 0 <= x23 - 1 f96_0_random_GT(x30, x31, x32) -> f167_0_log_LT(x33, x34, x35) :|: 0 = x35 && x31 = x34 && 0 = x33 && 0 <= x30 - 1 f154_0_main_InvokeMethod(x36, x37, x38) -> f167_0_log_LT(x39, x40, x41) :|: 0 <= x36 - 1 && 1 <= x42 - 1 && x38 = x39 && x37 = x40 && x38 = x41 f167_0_log_LT(x43, x44, x45) -> f167_0_log_LT'(x46, x47, x48) :|: 1 <= x44 - 1 && 1 <= x43 - 1 && x49 <= x44 - 1 && x43 <= x44 && x43 = x45 && x43 = x46 && x44 = x47 && x43 = x48 f167_0_log_LT'(x50, x51, x52) -> f167_0_log_LT(x53, x54, x55) :|: x50 = x55 && x50 = x53 && x50 = x52 && 0 <= x51 - x50 * x54 && x51 - x50 * x54 <= x50 - 1 && x54 <= x51 - 1 && x50 <= x51 && 1 <= x50 - 1 && 1 <= x51 - 1 __init(x56, x57, x58) -> f1_0_main_Load(x59, x60, x61) :|: 0 <= 0 Start term: __init(arg1, arg2, arg3) ---------------------------------------- (3) IRSwTTerminationDigraphProof (EQUIVALENT) Constructed termination digraph! Nodes: (1) f1_0_main_Load(arg1, arg2, arg3) -> f96_0_random_GT(arg1P, arg2P, arg3P) :|: 0 = arg2P && 0 <= arg1P - 1 && 0 <= arg1 - 1 && 0 <= arg2 - 1 && arg1P <= arg1 (2) f1_0_main_Load(x, x1, x2) -> f96_0_random_GT(x3, x4, x5) :|: 0 <= x3 - 1 && 0 <= x - 1 && x3 <= x && 0 <= x1 - 1 && -1 <= x4 - 1 (3) f96_0_random_GT(x6, x8, x9) -> f154_0_main_InvokeMethod(x10, x12, x13) :|: x10 <= x6 && 1 <= x14 - 1 && 0 <= x6 - 1 && 0 <= x10 - 1 && x8 = x12 && 0 = x13 (4) f96_0_random_GT(x15, x16, x17) -> f154_0_main_InvokeMethod(x18, x20, x21) :|: 1 <= x22 - 1 && -1 <= x21 - 1 && x18 <= x15 && 0 <= x15 - 1 && 0 <= x18 - 1 && x16 = x20 (5) f1_0_main_Load(x23, x24, x25) -> f167_0_log_LT(x26, x27, x29) :|: 0 = x29 && 0 = x27 && 0 = x26 && 0 = x24 && 0 <= x23 - 1 (6) f96_0_random_GT(x30, x31, x32) -> f167_0_log_LT(x33, x34, x35) :|: 0 = x35 && x31 = x34 && 0 = x33 && 0 <= x30 - 1 (7) f154_0_main_InvokeMethod(x36, x37, x38) -> f167_0_log_LT(x39, x40, x41) :|: 0 <= x36 - 1 && 1 <= x42 - 1 && x38 = x39 && x37 = x40 && x38 = x41 (8) f167_0_log_LT(x43, x44, x45) -> f167_0_log_LT'(x46, x47, x48) :|: 1 <= x44 - 1 && 1 <= x43 - 1 && x49 <= x44 - 1 && x43 <= x44 && x43 = x45 && x43 = x46 && x44 = x47 && x43 = x48 (9) f167_0_log_LT'(x50, x51, x52) -> f167_0_log_LT(x53, x54, x55) :|: x50 = x55 && x50 = x53 && x50 = x52 && 0 <= x51 - x50 * x54 && x51 - x50 * x54 <= x50 - 1 && x54 <= x51 - 1 && x50 <= x51 && 1 <= x50 - 1 && 1 <= x51 - 1 (10) __init(x56, x57, x58) -> f1_0_main_Load(x59, x60, x61) :|: 0 <= 0 Arcs: (1) -> (3), (4), (6) (2) -> (3), (4), (6) (3) -> (7) (4) -> (7) (7) -> (8) (8) -> (9) (9) -> (8) (10) -> (1), (2), (5) This digraph is fully evaluated! ---------------------------------------- (4) Obligation: Termination digraph: Nodes: (1) f167_0_log_LT(x43, x44, x45) -> f167_0_log_LT'(x46, x47, x48) :|: 1 <= x44 - 1 && 1 <= x43 - 1 && x49 <= x44 - 1 && x43 <= x44 && x43 = x45 && x43 = x46 && x44 = x47 && x43 = x48 (2) f167_0_log_LT'(x50, x51, x52) -> f167_0_log_LT(x53, x54, x55) :|: x50 = x55 && x50 = x53 && x50 = x52 && 0 <= x51 - x50 * x54 && x51 - x50 * x54 <= x50 - 1 && x54 <= x51 - 1 && x50 <= x51 && 1 <= x50 - 1 && 1 <= x51 - 1 Arcs: (1) -> (2) (2) -> (1) This digraph is fully evaluated! ---------------------------------------- (5) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (6) Obligation: Rules: f167_0_log_LT(x43:0, x44:0, x43:0) -> f167_0_log_LT(x43:0, x54:0, x43:0) :|: x54:0 <= x44:0 - 1 && x44:0 >= x43:0 && x44:0 - x43:0 * x54:0 <= x43:0 - 1 && x49:0 <= x44:0 - 1 && x44:0 - x43:0 * x54:0 >= 0 && x43:0 > 1 && x44:0 > 1 ---------------------------------------- (7) FilterProof (EQUIVALENT) Used the following sort dictionary for filtering: f167_0_log_LT(INTEGER, INTEGER, INTEGER) Replaced non-predefined constructor symbols by 0. ---------------------------------------- (8) Obligation: Rules: f167_0_log_LT(x43:0, x44:0, x43:0) -> f167_0_log_LT(x43:0, x54:0, x43:0) :|: x54:0 <= x44:0 - 1 && x44:0 >= x43:0 && x44:0 - x43:0 * x54:0 <= x43:0 - 1 && x49:0 <= x44:0 - 1 && x44:0 - x43:0 * x54:0 >= 0 && x43:0 > 1 && x44:0 > 1 ---------------------------------------- (9) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (10) Obligation: Rules: f167_0_log_LT(x43:0:0, x44:0:0, x43:0:01) -> f167_0_log_LT(x43:0:0, x54:0:0, x43:0:0) :|: x43:0:0 > 1 && x44:0:0 > 1 && x44:0:0 - x43:0:0 * x54:0:0 >= 0 && x49:0:0 <= x44:0:0 - 1 && x44:0:0 - x43:0:0 * x54:0:0 <= x43:0:0 - 1 && x44:0:0 >= x43:0:0 && x54:0:0 <= x44:0:0 - 1 && x43:0:0 = x43:0:01 ---------------------------------------- (11) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f167_0_log_LT ] = f167_0_log_LT_2 The following rules are decreasing: f167_0_log_LT(x43:0:0, x44:0:0, x43:0:01) -> f167_0_log_LT(x43:0:0, x54:0:0, x43:0:0) :|: x43:0:0 > 1 && x44:0:0 > 1 && x44:0:0 - x43:0:0 * x54:0:0 >= 0 && x49:0:0 <= x44:0:0 - 1 && x44:0:0 - x43:0:0 * x54:0:0 <= x43:0:0 - 1 && x44:0:0 >= x43:0:0 && x54:0:0 <= x44:0:0 - 1 && x43:0:0 = x43:0:01 The following rules are bounded: f167_0_log_LT(x43:0:0, x44:0:0, x43:0:01) -> f167_0_log_LT(x43:0:0, x54:0:0, x43:0:0) :|: x43:0:0 > 1 && x44:0:0 > 1 && x44:0:0 - x43:0:0 * x54:0:0 >= 0 && x49:0:0 <= x44:0:0 - 1 && x44:0:0 - x43:0:0 * x54:0:0 <= x43:0:0 - 1 && x44:0:0 >= x43:0:0 && x54:0:0 <= x44:0:0 - 1 && x43:0:0 = x43:0:01 ---------------------------------------- (12) YES