YES proof of prog.inttrs # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty Termination of the given IRSwT could be proven: (0) IRSwT (1) IRSFormatTransformerProof [EQUIVALENT, 0 ms] (2) IRSwT (3) IRSwTTerminationDigraphProof [EQUIVALENT, 284 ms] (4) IRSwT (5) IntTRSCompressionProof [EQUIVALENT, 0 ms] (6) IRSwT (7) TempFilterProof [SOUND, 57 ms] (8) IntTRS (9) PolynomialOrderProcessor [EQUIVALENT, 15 ms] (10) IntTRS (11) RankingReductionPairProof [EQUIVALENT, 0 ms] (12) YES ---------------------------------------- (0) Obligation: Rules: f1_0_main_Load(arg1, arg2) -> f152_0_gcd_EQ(arg1P, arg2P) :|: 0 <= arg1 - 1 && -1 <= arg1P - 1 && -1 <= arg2 - 1 && -1 <= arg2P - 1 f152_0_gcd_EQ(x, x1) -> f207_0_mod_LE(x2, x3) :|: x1 = x3 && x = x2 && 0 <= x - 1 && x <= x1 - 1 && 0 <= x1 - 1 f152_0_gcd_EQ(x4, x5) -> f207_0_mod_LE(x6, x7) :|: x5 = x7 && x4 = x6 && 0 <= x4 - 1 && x5 <= x4 - 1 && 0 <= x5 - 1 f152_0_gcd_EQ(x8, x9) -> f152_0_gcd_EQ(x10, x11) :|: 0 = x11 && x9 = x10 && 0 = x8 && 0 <= x9 - 1 f152_0_gcd_EQ(x12, x13) -> f152_0_gcd_EQ(x14, x15) :|: 0 = x15 && x12 = x14 && x12 = x13 && 0 <= x12 - 1 f207_0_mod_LE(x16, x17) -> f207_0_mod_LE(x18, x19) :|: x17 = x19 && x16 - x17 = x18 && 0 <= x17 - 1 && 0 <= x16 - 1 && x17 <= x16 - 1 f207_0_mod_LE(x20, x21) -> f152_0_gcd_EQ(x22, x23) :|: x20 = x23 && x21 = x22 && x20 <= x21 - 1 __init(x24, x25) -> f1_0_main_Load(x26, x27) :|: 0 <= 0 Start term: __init(arg1, arg2) ---------------------------------------- (1) IRSFormatTransformerProof (EQUIVALENT) Reformatted IRS to match normalized format (transformed away non-linear left-hand sides, !=, / and %). ---------------------------------------- (2) Obligation: Rules: f1_0_main_Load(arg1, arg2) -> f152_0_gcd_EQ(arg1P, arg2P) :|: 0 <= arg1 - 1 && -1 <= arg1P - 1 && -1 <= arg2 - 1 && -1 <= arg2P - 1 f152_0_gcd_EQ(x, x1) -> f207_0_mod_LE(x2, x3) :|: x1 = x3 && x = x2 && 0 <= x - 1 && x <= x1 - 1 && 0 <= x1 - 1 f152_0_gcd_EQ(x4, x5) -> f207_0_mod_LE(x6, x7) :|: x5 = x7 && x4 = x6 && 0 <= x4 - 1 && x5 <= x4 - 1 && 0 <= x5 - 1 f152_0_gcd_EQ(x8, x9) -> f152_0_gcd_EQ(x10, x11) :|: 0 = x11 && x9 = x10 && 0 = x8 && 0 <= x9 - 1 f152_0_gcd_EQ(x12, x13) -> f152_0_gcd_EQ(x14, x15) :|: 0 = x15 && x12 = x14 && x12 = x13 && 0 <= x12 - 1 f207_0_mod_LE(x16, x17) -> f207_0_mod_LE(x18, x19) :|: x17 = x19 && x16 - x17 = x18 && 0 <= x17 - 1 && 0 <= x16 - 1 && x17 <= x16 - 1 f207_0_mod_LE(x20, x21) -> f152_0_gcd_EQ(x22, x23) :|: x20 = x23 && x21 = x22 && x20 <= x21 - 1 __init(x24, x25) -> f1_0_main_Load(x26, x27) :|: 0 <= 0 Start term: __init(arg1, arg2) ---------------------------------------- (3) IRSwTTerminationDigraphProof (EQUIVALENT) Constructed termination digraph! Nodes: (1) f1_0_main_Load(arg1, arg2) -> f152_0_gcd_EQ(arg1P, arg2P) :|: 0 <= arg1 - 1 && -1 <= arg1P - 1 && -1 <= arg2 - 1 && -1 <= arg2P - 1 (2) f152_0_gcd_EQ(x, x1) -> f207_0_mod_LE(x2, x3) :|: x1 = x3 && x = x2 && 0 <= x - 1 && x <= x1 - 1 && 0 <= x1 - 1 (3) f152_0_gcd_EQ(x4, x5) -> f207_0_mod_LE(x6, x7) :|: x5 = x7 && x4 = x6 && 0 <= x4 - 1 && x5 <= x4 - 1 && 0 <= x5 - 1 (4) f152_0_gcd_EQ(x8, x9) -> f152_0_gcd_EQ(x10, x11) :|: 0 = x11 && x9 = x10 && 0 = x8 && 0 <= x9 - 1 (5) f152_0_gcd_EQ(x12, x13) -> f152_0_gcd_EQ(x14, x15) :|: 0 = x15 && x12 = x14 && x12 = x13 && 0 <= x12 - 1 (6) f207_0_mod_LE(x16, x17) -> f207_0_mod_LE(x18, x19) :|: x17 = x19 && x16 - x17 = x18 && 0 <= x17 - 1 && 0 <= x16 - 1 && x17 <= x16 - 1 (7) f207_0_mod_LE(x20, x21) -> f152_0_gcd_EQ(x22, x23) :|: x20 = x23 && x21 = x22 && x20 <= x21 - 1 (8) __init(x24, x25) -> f1_0_main_Load(x26, x27) :|: 0 <= 0 Arcs: (1) -> (2), (3), (4), (5) (2) -> (7) (3) -> (6) (6) -> (6), (7) (7) -> (3) (8) -> (1) This digraph is fully evaluated! ---------------------------------------- (4) Obligation: Termination digraph: Nodes: (1) f207_0_mod_LE(x20, x21) -> f152_0_gcd_EQ(x22, x23) :|: x20 = x23 && x21 = x22 && x20 <= x21 - 1 (2) f207_0_mod_LE(x16, x17) -> f207_0_mod_LE(x18, x19) :|: x17 = x19 && x16 - x17 = x18 && 0 <= x17 - 1 && 0 <= x16 - 1 && x17 <= x16 - 1 (3) f152_0_gcd_EQ(x4, x5) -> f207_0_mod_LE(x6, x7) :|: x5 = x7 && x4 = x6 && 0 <= x4 - 1 && x5 <= x4 - 1 && 0 <= x5 - 1 Arcs: (1) -> (3) (2) -> (1), (2) (3) -> (2) This digraph is fully evaluated! ---------------------------------------- (5) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (6) Obligation: Rules: f207_0_mod_LE(x20:0, x21:0) -> f207_0_mod_LE(x21:0, x20:0) :|: x20:0 > 0 && x21:0 > 0 && x21:0 - 1 >= x20:0 f207_0_mod_LE(x16:0, x17:0) -> f207_0_mod_LE(x16:0 - x17:0, x17:0) :|: x16:0 > 0 && x17:0 > 0 && x17:0 <= x16:0 - 1 ---------------------------------------- (7) TempFilterProof (SOUND) Used the following sort dictionary for filtering: f207_0_mod_LE(INTEGER, INTEGER) Replaced non-predefined constructor symbols by 0. ---------------------------------------- (8) Obligation: Rules: f207_0_mod_LE(x20:0, x21:0) -> f207_0_mod_LE(x21:0, x20:0) :|: x20:0 > 0 && x21:0 > 0 && x21:0 - 1 >= x20:0 f207_0_mod_LE(x16:0, x17:0) -> f207_0_mod_LE(c, x17:0) :|: c = x16:0 - x17:0 && (x16:0 > 0 && x17:0 > 0 && x17:0 <= x16:0 - 1) ---------------------------------------- (9) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f207_0_mod_LE(x, x1)] = -2 + x1 The following rules are decreasing: f207_0_mod_LE(x20:0, x21:0) -> f207_0_mod_LE(x21:0, x20:0) :|: x20:0 > 0 && x21:0 > 0 && x21:0 - 1 >= x20:0 The following rules are bounded: f207_0_mod_LE(x20:0, x21:0) -> f207_0_mod_LE(x21:0, x20:0) :|: x20:0 > 0 && x21:0 > 0 && x21:0 - 1 >= x20:0 ---------------------------------------- (10) Obligation: Rules: f207_0_mod_LE(x16:0, x17:0) -> f207_0_mod_LE(c, x17:0) :|: c = x16:0 - x17:0 && (x16:0 > 0 && x17:0 > 0 && x17:0 <= x16:0 - 1) ---------------------------------------- (11) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f207_0_mod_LE ] = f207_0_mod_LE_1 The following rules are decreasing: f207_0_mod_LE(x16:0, x17:0) -> f207_0_mod_LE(c, x17:0) :|: c = x16:0 - x17:0 && (x16:0 > 0 && x17:0 > 0 && x17:0 <= x16:0 - 1) The following rules are bounded: f207_0_mod_LE(x16:0, x17:0) -> f207_0_mod_LE(c, x17:0) :|: c = x16:0 - x17:0 && (x16:0 > 0 && x17:0 > 0 && x17:0 <= x16:0 - 1) ---------------------------------------- (12) YES