NO Ultimate: Cannot open display: This is Ultimate 0.1.24-8dc7c08-m [2020-06-22 01:08:10,817 INFO L170 SettingsManager]: Resetting all preferences to default values... [2020-06-22 01:08:10,819 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2020-06-22 01:08:10,830 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2020-06-22 01:08:10,830 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2020-06-22 01:08:10,831 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2020-06-22 01:08:10,832 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2020-06-22 01:08:10,834 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2020-06-22 01:08:10,835 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2020-06-22 01:08:10,836 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2020-06-22 01:08:10,837 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2020-06-22 01:08:10,837 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2020-06-22 01:08:10,838 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2020-06-22 01:08:10,839 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2020-06-22 01:08:10,840 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2020-06-22 01:08:10,841 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2020-06-22 01:08:10,841 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2020-06-22 01:08:10,843 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2020-06-22 01:08:10,845 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2020-06-22 01:08:10,846 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2020-06-22 01:08:10,847 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2020-06-22 01:08:10,848 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2020-06-22 01:08:10,850 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2020-06-22 01:08:10,851 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2020-06-22 01:08:10,851 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2020-06-22 01:08:10,852 INFO L174 SettingsManager]: Resetting IcfgToChc preferences to default values [2020-06-22 01:08:10,852 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2020-06-22 01:08:10,853 INFO L177 SettingsManager]: ReqToTest provides no preferences, ignoring... [2020-06-22 01:08:10,853 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2020-06-22 01:08:10,854 INFO L174 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2020-06-22 01:08:10,854 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2020-06-22 01:08:10,855 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2020-06-22 01:08:10,856 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2020-06-22 01:08:10,856 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2020-06-22 01:08:10,857 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2020-06-22 01:08:10,857 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2020-06-22 01:08:10,857 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2020-06-22 01:08:10,858 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2020-06-22 01:08:10,859 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2020-06-22 01:08:10,859 INFO L98 SettingsManager]: Beginning loading settings from /export/starexec/sandbox2/solver/bin/./../termcomp2017.epf [2020-06-22 01:08:10,873 INFO L110 SettingsManager]: Loading preferences was successful [2020-06-22 01:08:10,873 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2020-06-22 01:08:10,874 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2020-06-22 01:08:10,874 INFO L133 SettingsManager]: * Rewrite not-equals=true [2020-06-22 01:08:10,875 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2020-06-22 01:08:10,875 INFO L133 SettingsManager]: * Minimize states using LBE with the strategy=SINGLE [2020-06-22 01:08:10,875 INFO L133 SettingsManager]: * Use SBE=true [2020-06-22 01:08:10,875 INFO L131 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2020-06-22 01:08:10,875 INFO L133 SettingsManager]: * Use old map elimination=false [2020-06-22 01:08:10,875 INFO L133 SettingsManager]: * Use external solver (rank synthesis)=false [2020-06-22 01:08:10,876 INFO L133 SettingsManager]: * Buchi interpolant automaton construction strategy=DANDELION [2020-06-22 01:08:10,876 INFO L133 SettingsManager]: * Use only trivial implications for array writes=true [2020-06-22 01:08:10,876 INFO L133 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2020-06-22 01:08:10,876 INFO L133 SettingsManager]: * Construct termination proof for TermComp=true [2020-06-22 01:08:10,876 INFO L133 SettingsManager]: * Command for external solver (GNTA synthesis)=z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:12000 [2020-06-22 01:08:10,876 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2020-06-22 01:08:10,877 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2020-06-22 01:08:10,877 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2020-06-22 01:08:10,877 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2020-06-22 01:08:10,877 INFO L133 SettingsManager]: * Assume nondeterminstic values are in range=false [2020-06-22 01:08:10,877 INFO L133 SettingsManager]: * How to treat unsigned ints differently from normal ones=IGNORE [2020-06-22 01:08:10,877 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2020-06-22 01:08:10,877 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2020-06-22 01:08:10,878 INFO L133 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2020-06-22 01:08:10,878 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 [2020-06-22 01:08:10,878 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2020-06-22 01:08:10,878 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2020-06-22 01:08:10,878 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2020-06-22 01:08:10,878 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2020-06-22 01:08:10,903 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2020-06-22 01:08:10,916 INFO L259 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2020-06-22 01:08:10,920 INFO L215 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2020-06-22 01:08:10,921 INFO L271 PluginConnector]: Initializing CDTParser... [2020-06-22 01:08:10,922 INFO L276 PluginConnector]: CDTParser initialized [2020-06-22 01:08:10,922 INFO L430 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /export/starexec/sandbox2/benchmark/theBenchmark.c [2020-06-22 01:08:10,991 INFO L221 CDTParser]: Created temporary CDT project at /export/starexec/sandbox2/tmp/6abd009c61714344bbe0743b05662855/FLAG1c0aa583d [2020-06-22 01:08:11,339 INFO L307 CDTParser]: Found 1 translation units. [2020-06-22 01:08:11,340 INFO L161 CDTParser]: Scanning /export/starexec/sandbox2/benchmark/theBenchmark.c [2020-06-22 01:08:11,349 INFO L355 CDTParser]: About to delete temporary CDT project at /export/starexec/sandbox2/tmp/6abd009c61714344bbe0743b05662855/FLAG1c0aa583d [2020-06-22 01:08:11,728 INFO L363 CDTParser]: Successfully deleted /export/starexec/sandbox2/tmp/6abd009c61714344bbe0743b05662855 [2020-06-22 01:08:11,739 INFO L297 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2020-06-22 01:08:11,741 INFO L131 ToolchainWalker]: Walking toolchain with 7 elements. [2020-06-22 01:08:11,742 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2020-06-22 01:08:11,742 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2020-06-22 01:08:11,746 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2020-06-22 01:08:11,747 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.06 01:08:11" (1/1) ... [2020-06-22 01:08:11,751 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@90e0b10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:11, skipping insertion in model container [2020-06-22 01:08:11,751 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.06 01:08:11" (1/1) ... [2020-06-22 01:08:11,759 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2020-06-22 01:08:11,790 INFO L176 MainTranslator]: Built tables and reachable declarations [2020-06-22 01:08:12,055 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-06-22 01:08:12,062 INFO L191 MainTranslator]: Completed pre-run [2020-06-22 01:08:12,100 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-06-22 01:08:12,118 INFO L195 MainTranslator]: Completed translation [2020-06-22 01:08:12,119 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12 WrapperNode [2020-06-22 01:08:12,119 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2020-06-22 01:08:12,120 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2020-06-22 01:08:12,120 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2020-06-22 01:08:12,120 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2020-06-22 01:08:12,129 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,137 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,170 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2020-06-22 01:08:12,171 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2020-06-22 01:08:12,171 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2020-06-22 01:08:12,171 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2020-06-22 01:08:12,181 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,181 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,184 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,184 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,191 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,200 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,202 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,206 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2020-06-22 01:08:12,206 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2020-06-22 01:08:12,206 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2020-06-22 01:08:12,206 INFO L276 PluginConnector]: RCFGBuilder initialized [2020-06-22 01:08:12,207 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (1/1) ... No working directory specified, using /export/starexec/sandbox2/solver/bin/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 [2020-06-22 01:08:12,272 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2020-06-22 01:08:12,273 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2020-06-22 01:08:12,801 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2020-06-22 01:08:12,801 INFO L286 CfgBuilder]: Removed 82 assue(true) statements. [2020-06-22 01:08:12,803 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.06 01:08:12 BoogieIcfgContainer [2020-06-22 01:08:12,803 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2020-06-22 01:08:12,803 INFO L113 PluginConnector]: ------------------------BlockEncodingV2---------------------------- [2020-06-22 01:08:12,803 INFO L271 PluginConnector]: Initializing BlockEncodingV2... [2020-06-22 01:08:12,805 INFO L276 PluginConnector]: BlockEncodingV2 initialized [2020-06-22 01:08:12,806 INFO L185 PluginConnector]: Executing the observer BlockEncodingObserver from plugin BlockEncodingV2 for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.06 01:08:12" (1/1) ... [2020-06-22 01:08:12,831 INFO L313 BlockEncoder]: Initial Icfg 146 locations, 229 edges [2020-06-22 01:08:12,833 INFO L258 BlockEncoder]: Using Remove infeasible edges [2020-06-22 01:08:12,834 INFO L263 BlockEncoder]: Using Maximize final states [2020-06-22 01:08:12,834 INFO L270 BlockEncoder]: Using Minimize states even if more edges are added than removed.=false [2020-06-22 01:08:12,835 INFO L276 BlockEncoder]: Using Minimize states using LBE with the strategy=SINGLE [2020-06-22 01:08:12,837 INFO L296 BlockEncoder]: Using Remove sink states [2020-06-22 01:08:12,837 INFO L171 BlockEncoder]: Using Apply optimizations until nothing changes=true [2020-06-22 01:08:12,838 INFO L179 BlockEncoder]: Using Rewrite not-equals [2020-06-22 01:08:12,876 INFO L185 BlockEncoder]: Using Use SBE [2020-06-22 01:08:12,925 INFO L200 BlockEncoder]: SBE split 72 edges [2020-06-22 01:08:12,931 INFO L70 emoveInfeasibleEdges]: Removed 10 edges and 0 locations because of local infeasibility [2020-06-22 01:08:12,935 INFO L71 MaximizeFinalStates]: 0 new accepting states [2020-06-22 01:08:12,978 INFO L100 BaseMinimizeStates]: Removed 52 edges and 26 locations by large block encoding [2020-06-22 01:08:12,981 INFO L70 RemoveSinkStates]: Removed 6 edges and 4 locations by removing sink states [2020-06-22 01:08:12,983 INFO L70 emoveInfeasibleEdges]: Removed 0 edges and 0 locations because of local infeasibility [2020-06-22 01:08:12,984 INFO L71 MaximizeFinalStates]: 0 new accepting states [2020-06-22 01:08:12,993 INFO L100 BaseMinimizeStates]: Removed 4 edges and 2 locations by large block encoding [2020-06-22 01:08:12,993 INFO L70 RemoveSinkStates]: Removed 0 edges and 0 locations by removing sink states [2020-06-22 01:08:12,994 INFO L70 emoveInfeasibleEdges]: Removed 0 edges and 0 locations because of local infeasibility [2020-06-22 01:08:12,994 INFO L71 MaximizeFinalStates]: 0 new accepting states [2020-06-22 01:08:12,995 INFO L100 BaseMinimizeStates]: Removed 0 edges and 0 locations by large block encoding [2020-06-22 01:08:12,995 INFO L70 RemoveSinkStates]: Removed 0 edges and 0 locations by removing sink states [2020-06-22 01:08:12,996 INFO L313 BlockEncoder]: Encoded RCFG 114 locations, 257 edges [2020-06-22 01:08:12,997 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 22.06 01:08:12 BasicIcfg [2020-06-22 01:08:12,997 INFO L132 PluginConnector]: ------------------------ END BlockEncodingV2---------------------------- [2020-06-22 01:08:12,998 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2020-06-22 01:08:12,998 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2020-06-22 01:08:13,001 INFO L276 PluginConnector]: TraceAbstraction initialized [2020-06-22 01:08:13,002 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.06 01:08:11" (1/4) ... [2020-06-22 01:08:13,003 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@246ce4d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.06 01:08:13, skipping insertion in model container [2020-06-22 01:08:13,003 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (2/4) ... [2020-06-22 01:08:13,003 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@246ce4d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.06 01:08:13, skipping insertion in model container [2020-06-22 01:08:13,004 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.06 01:08:12" (3/4) ... [2020-06-22 01:08:13,004 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@246ce4d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.06 01:08:13, skipping insertion in model container [2020-06-22 01:08:13,004 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 22.06 01:08:12" (4/4) ... [2020-06-22 01:08:13,006 INFO L112 eAbstractionObserver]: Analyzing ICFG theBenchmark.c_BEv2 [2020-06-22 01:08:13,017 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2020-06-22 01:08:13,026 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 0 error locations. [2020-06-22 01:08:13,045 INFO L257 AbstractCegarLoop]: Starting to check reachability of 0 error locations. [2020-06-22 01:08:13,076 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2020-06-22 01:08:13,077 INFO L382 AbstractCegarLoop]: Interprodecural is true [2020-06-22 01:08:13,077 INFO L383 AbstractCegarLoop]: Hoare is true [2020-06-22 01:08:13,077 INFO L384 AbstractCegarLoop]: Compute interpolants for ForwardPredicates [2020-06-22 01:08:13,077 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-06-22 01:08:13,077 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-06-22 01:08:13,078 INFO L387 AbstractCegarLoop]: Difference is false [2020-06-22 01:08:13,078 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-06-22 01:08:13,078 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-06-22 01:08:13,095 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states. [2020-06-22 01:08:13,105 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-06-22 01:08:13,111 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 114 states. [2020-06-22 01:08:13,214 INFO L448 ceAbstractionStarter]: For program point L225(lines 225 232) no Hoare annotation was computed. [2020-06-22 01:08:13,214 INFO L448 ceAbstractionStarter]: For program point L126(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,215 INFO L451 ceAbstractionStarter]: At program point L93(lines 93 97) the Hoare annotation is: true [2020-06-22 01:08:13,215 INFO L448 ceAbstractionStarter]: For program point L126-2(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,215 INFO L448 ceAbstractionStarter]: For program point L126-3(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,215 INFO L451 ceAbstractionStarter]: At program point L217(lines 217 221) the Hoare annotation is: true [2020-06-22 01:08:13,215 INFO L448 ceAbstractionStarter]: For program point L126-5(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,215 INFO L448 ceAbstractionStarter]: For program point L217-1(lines 212 250) no Hoare annotation was computed. [2020-06-22 01:08:13,215 INFO L448 ceAbstractionStarter]: For program point L126-6(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,216 INFO L448 ceAbstractionStarter]: For program point L126-8(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,216 INFO L448 ceAbstractionStarter]: For program point L126-9(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,216 INFO L448 ceAbstractionStarter]: For program point L126-11(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,216 INFO L448 ceAbstractionStarter]: For program point L126-12(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,216 INFO L448 ceAbstractionStarter]: For program point L126-14(lines 126 135) no Hoare annotation was computed. [2020-06-22 01:08:13,216 INFO L451 ceAbstractionStarter]: At program point L449(lines 449 458) the Hoare annotation is: true [2020-06-22 01:08:13,217 INFO L451 ceAbstractionStarter]: At program point L449-1(lines 449 458) the Hoare annotation is: true [2020-06-22 01:08:13,217 INFO L448 ceAbstractionStarter]: For program point L127(lines 127 132) no Hoare annotation was computed. [2020-06-22 01:08:13,217 INFO L448 ceAbstractionStarter]: For program point L127-1(lines 127 132) no Hoare annotation was computed. [2020-06-22 01:08:13,217 INFO L451 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2020-06-22 01:08:13,217 INFO L448 ceAbstractionStarter]: For program point L127-2(lines 127 132) no Hoare annotation was computed. [2020-06-22 01:08:13,217 INFO L448 ceAbstractionStarter]: For program point L127-3(lines 127 132) no Hoare annotation was computed. [2020-06-22 01:08:13,218 INFO L448 ceAbstractionStarter]: For program point L127-4(lines 127 132) no Hoare annotation was computed. [2020-06-22 01:08:13,218 INFO L451 ceAbstractionStarter]: At program point L276-1(lines 257 284) the Hoare annotation is: true [2020-06-22 01:08:13,218 INFO L451 ceAbstractionStarter]: At program point L276-3(lines 257 284) the Hoare annotation is: true [2020-06-22 01:08:13,218 INFO L451 ceAbstractionStarter]: At program point L177-1(lines 261 265) the Hoare annotation is: true [2020-06-22 01:08:13,218 INFO L448 ceAbstractionStarter]: For program point L367-1(lines 361 384) no Hoare annotation was computed. [2020-06-22 01:08:13,218 INFO L451 ceAbstractionStarter]: At program point L202(lines 189 204) the Hoare annotation is: true [2020-06-22 01:08:13,218 INFO L451 ceAbstractionStarter]: At program point L202-1(lines 189 204) the Hoare annotation is: true [2020-06-22 01:08:13,219 INFO L451 ceAbstractionStarter]: At program point L202-2(lines 189 204) the Hoare annotation is: true [2020-06-22 01:08:13,219 INFO L451 ceAbstractionStarter]: At program point L70(lines 33 84) the Hoare annotation is: true [2020-06-22 01:08:13,219 INFO L451 ceAbstractionStarter]: At program point L37(lines 37 41) the Hoare annotation is: true [2020-06-22 01:08:13,219 INFO L448 ceAbstractionStarter]: For program point L194(lines 194 199) no Hoare annotation was computed. [2020-06-22 01:08:13,219 INFO L448 ceAbstractionStarter]: For program point L194-1(lines 194 199) no Hoare annotation was computed. [2020-06-22 01:08:13,219 INFO L448 ceAbstractionStarter]: For program point L194-2(lines 194 199) no Hoare annotation was computed. [2020-06-22 01:08:13,219 INFO L448 ceAbstractionStarter]: For program point L145(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,220 INFO L448 ceAbstractionStarter]: For program point L145-2(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,220 INFO L448 ceAbstractionStarter]: For program point L145-3(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,220 INFO L451 ceAbstractionStarter]: At program point L236(lines 212 250) the Hoare annotation is: true [2020-06-22 01:08:13,220 INFO L448 ceAbstractionStarter]: For program point L145-5(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,220 INFO L448 ceAbstractionStarter]: For program point L145-6(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,220 INFO L451 ceAbstractionStarter]: At program point L137(lines 125 139) the Hoare annotation is: true [2020-06-22 01:08:13,220 INFO L448 ceAbstractionStarter]: For program point L145-8(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,221 INFO L451 ceAbstractionStarter]: At program point L137-1(lines 125 139) the Hoare annotation is: true [2020-06-22 01:08:13,221 INFO L448 ceAbstractionStarter]: For program point L145-9(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,221 INFO L448 ceAbstractionStarter]: For program point L71(lines 71 75) no Hoare annotation was computed. [2020-06-22 01:08:13,221 INFO L451 ceAbstractionStarter]: At program point L137-2(lines 125 139) the Hoare annotation is: true [2020-06-22 01:08:13,221 INFO L451 ceAbstractionStarter]: At program point L137-3(lines 125 139) the Hoare annotation is: true [2020-06-22 01:08:13,221 INFO L448 ceAbstractionStarter]: For program point L145-11(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,221 INFO L448 ceAbstractionStarter]: For program point L294-1(lines 288 311) no Hoare annotation was computed. [2020-06-22 01:08:13,222 INFO L451 ceAbstractionStarter]: At program point L137-4(lines 125 139) the Hoare annotation is: true [2020-06-22 01:08:13,222 INFO L448 ceAbstractionStarter]: For program point L145-12(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,222 INFO L448 ceAbstractionStarter]: For program point L261-1(lines 260 283) no Hoare annotation was computed. [2020-06-22 01:08:13,222 INFO L448 ceAbstractionStarter]: For program point L261-2(lines 261 265) no Hoare annotation was computed. [2020-06-22 01:08:13,222 INFO L448 ceAbstractionStarter]: For program point L294-3(lines 288 311) no Hoare annotation was computed. [2020-06-22 01:08:13,222 INFO L448 ceAbstractionStarter]: For program point L145-14(lines 145 154) no Hoare annotation was computed. [2020-06-22 01:08:13,222 INFO L448 ceAbstractionStarter]: For program point L261-4(lines 260 283) no Hoare annotation was computed. [2020-06-22 01:08:13,223 INFO L448 ceAbstractionStarter]: For program point L146(lines 146 151) no Hoare annotation was computed. [2020-06-22 01:08:13,223 INFO L448 ceAbstractionStarter]: For program point L146-1(lines 146 151) no Hoare annotation was computed. [2020-06-22 01:08:13,223 INFO L448 ceAbstractionStarter]: For program point L146-2(lines 146 151) no Hoare annotation was computed. [2020-06-22 01:08:13,223 INFO L448 ceAbstractionStarter]: For program point L146-3(lines 146 151) no Hoare annotation was computed. [2020-06-22 01:08:13,223 INFO L448 ceAbstractionStarter]: For program point L146-4(lines 146 151) no Hoare annotation was computed. [2020-06-22 01:08:13,223 INFO L448 ceAbstractionStarter]: For program point L72(lines 72 74) no Hoare annotation was computed. [2020-06-22 01:08:13,223 INFO L448 ceAbstractionStarter]: For program point L64(lines 64 68) no Hoare annotation was computed. [2020-06-22 01:08:13,224 INFO L448 ceAbstractionStarter]: For program point L64-1(lines 63 77) no Hoare annotation was computed. [2020-06-22 01:08:13,224 INFO L451 ceAbstractionStarter]: At program point L411(lines 400 413) the Hoare annotation is: true [2020-06-22 01:08:13,224 INFO L448 ceAbstractionStarter]: For program point L271-1(lines 260 283) no Hoare annotation was computed. [2020-06-22 01:08:13,224 INFO L451 ceAbstractionStarter]: At program point L304-3(lines 285 312) the Hoare annotation is: true [2020-06-22 01:08:13,224 INFO L448 ceAbstractionStarter]: For program point L271-3(lines 260 283) no Hoare annotation was computed. [2020-06-22 01:08:13,224 INFO L448 ceAbstractionStarter]: For program point L172-1(lines 171 184) no Hoare annotation was computed. [2020-06-22 01:08:13,224 INFO L448 ceAbstractionStarter]: For program point L329(lines 329 333) no Hoare annotation was computed. [2020-06-22 01:08:13,225 INFO L448 ceAbstractionStarter]: For program point L362-1(lines 361 384) no Hoare annotation was computed. [2020-06-22 01:08:13,225 INFO L451 ceAbstractionStarter]: At program point L329-2(lines 289 293) the Hoare annotation is: true [2020-06-22 01:08:13,225 INFO L448 ceAbstractionStarter]: For program point L329-3(lines 329 333) no Hoare annotation was computed. [2020-06-22 01:08:13,225 INFO L451 ceAbstractionStarter]: At program point L329-5(lines 1 485) the Hoare annotation is: true [2020-06-22 01:08:13,225 INFO L448 ceAbstractionStarter]: For program point L329-6(lines 329 333) no Hoare annotation was computed. [2020-06-22 01:08:13,225 INFO L448 ceAbstractionStarter]: For program point L321(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,225 INFO L448 ceAbstractionStarter]: For program point L65(lines 65 67) no Hoare annotation was computed. [2020-06-22 01:08:13,226 INFO L451 ceAbstractionStarter]: At program point L329-8(lines 1 485) the Hoare annotation is: true [2020-06-22 01:08:13,226 INFO L448 ceAbstractionStarter]: For program point L329-9(lines 329 333) no Hoare annotation was computed. [2020-06-22 01:08:13,226 INFO L448 ceAbstractionStarter]: For program point L321-2(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,226 INFO L451 ceAbstractionStarter]: At program point L222(lines 212 250) the Hoare annotation is: true [2020-06-22 01:08:13,226 INFO L448 ceAbstractionStarter]: For program point L321-3(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,226 INFO L451 ceAbstractionStarter]: At program point L329-11(lines 289 293) the Hoare annotation is: true [2020-06-22 01:08:13,226 INFO L448 ceAbstractionStarter]: For program point L329-12(lines 329 333) no Hoare annotation was computed. [2020-06-22 01:08:13,227 INFO L451 ceAbstractionStarter]: At program point L156(lines 144 158) the Hoare annotation is: true [2020-06-22 01:08:13,227 INFO L448 ceAbstractionStarter]: For program point L321-5(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,227 INFO L448 ceAbstractionStarter]: For program point L321-6(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,227 INFO L451 ceAbstractionStarter]: At program point L156-1(lines 144 158) the Hoare annotation is: true [2020-06-22 01:08:13,227 INFO L451 ceAbstractionStarter]: At program point L329-14(lines 362 366) the Hoare annotation is: true [2020-06-22 01:08:13,227 INFO L448 ceAbstractionStarter]: For program point L90(lines 90 98) no Hoare annotation was computed. [2020-06-22 01:08:13,227 INFO L451 ceAbstractionStarter]: At program point L156-2(lines 144 158) the Hoare annotation is: true [2020-06-22 01:08:13,228 INFO L451 ceAbstractionStarter]: At program point L156-3(lines 144 158) the Hoare annotation is: true [2020-06-22 01:08:13,228 INFO L448 ceAbstractionStarter]: For program point L321-8(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,228 INFO L448 ceAbstractionStarter]: For program point L321-9(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,228 INFO L451 ceAbstractionStarter]: At program point L156-4(lines 144 158) the Hoare annotation is: true [2020-06-22 01:08:13,228 INFO L448 ceAbstractionStarter]: For program point L321-11(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,228 INFO L448 ceAbstractionStarter]: For program point L321-12(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,228 INFO L448 ceAbstractionStarter]: For program point L404(lines 404 409) no Hoare annotation was computed. [2020-06-22 01:08:13,228 INFO L448 ceAbstractionStarter]: For program point L321-14(lines 321 325) no Hoare annotation was computed. [2020-06-22 01:08:13,229 INFO L448 ceAbstractionStarter]: For program point L239(lines 239 246) no Hoare annotation was computed. [2020-06-22 01:08:13,229 INFO L451 ceAbstractionStarter]: At program point L165(lines 172 176) the Hoare annotation is: true [2020-06-22 01:08:13,229 INFO L448 ceAbstractionStarter]: For program point L289-1(lines 288 311) no Hoare annotation was computed. [2020-06-22 01:08:13,229 INFO L448 ceAbstractionStarter]: For program point L190(lines 190 200) no Hoare annotation was computed. [2020-06-22 01:08:13,229 INFO L448 ceAbstractionStarter]: For program point L289-3(lines 288 311) no Hoare annotation was computed. [2020-06-22 01:08:13,229 INFO L448 ceAbstractionStarter]: For program point L190-1(lines 190 200) no Hoare annotation was computed. [2020-06-22 01:08:13,229 INFO L448 ceAbstractionStarter]: For program point L190-2(lines 190 200) no Hoare annotation was computed. [2020-06-22 01:08:13,230 INFO L448 ceAbstractionStarter]: For program point L372-1(lines 361 384) no Hoare annotation was computed. [2020-06-22 01:08:13,230 INFO L451 ceAbstractionStarter]: At program point L430-1(lines 285 467) the Hoare annotation is: true [2020-06-22 01:08:13,230 INFO L448 ceAbstractionStarter]: For program point L34(lines 34 42) no Hoare annotation was computed. [2020-06-22 01:08:13,230 INFO L448 ceAbstractionStarter]: For program point L299-1(lines 288 311) no Hoare annotation was computed. [2020-06-22 01:08:13,230 INFO L448 ceAbstractionStarter]: For program point L266-1(lines 260 283) no Hoare annotation was computed. [2020-06-22 01:08:13,230 INFO L448 ceAbstractionStarter]: For program point L299-3(lines 288 311) no Hoare annotation was computed. [2020-06-22 01:08:13,230 INFO L448 ceAbstractionStarter]: For program point L266-3(lines 260 283) no Hoare annotation was computed. [2020-06-22 01:08:13,230 INFO L451 ceAbstractionStarter]: At program point L101-1(lines 89 120) the Hoare annotation is: true [2020-06-22 01:08:13,241 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.06 01:08:13 BasicIcfg [2020-06-22 01:08:13,241 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2020-06-22 01:08:13,242 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2020-06-22 01:08:13,242 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2020-06-22 01:08:13,245 INFO L276 PluginConnector]: BuchiAutomizer initialized [2020-06-22 01:08:13,246 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-06-22 01:08:13,246 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 22.06 01:08:11" (1/5) ... [2020-06-22 01:08:13,247 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2ea8d58e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.06 01:08:13, skipping insertion in model container [2020-06-22 01:08:13,247 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-06-22 01:08:13,247 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.06 01:08:12" (2/5) ... [2020-06-22 01:08:13,247 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2ea8d58e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.06 01:08:13, skipping insertion in model container [2020-06-22 01:08:13,247 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-06-22 01:08:13,248 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.06 01:08:12" (3/5) ... [2020-06-22 01:08:13,248 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2ea8d58e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 22.06 01:08:13, skipping insertion in model container [2020-06-22 01:08:13,248 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-06-22 01:08:13,248 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 22.06 01:08:12" (4/5) ... [2020-06-22 01:08:13,248 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2ea8d58e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 22.06 01:08:13, skipping insertion in model container [2020-06-22 01:08:13,249 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2020-06-22 01:08:13,249 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.06 01:08:13" (5/5) ... [2020-06-22 01:08:13,250 INFO L375 chiAutomizerObserver]: Analyzing ICFG theBenchmark.c_BEv2 [2020-06-22 01:08:13,275 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2020-06-22 01:08:13,275 INFO L374 BuchiCegarLoop]: Interprodecural is true [2020-06-22 01:08:13,275 INFO L375 BuchiCegarLoop]: Hoare is true [2020-06-22 01:08:13,275 INFO L376 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2020-06-22 01:08:13,275 INFO L377 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2020-06-22 01:08:13,276 INFO L378 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-06-22 01:08:13,276 INFO L379 BuchiCegarLoop]: Difference is false [2020-06-22 01:08:13,276 INFO L380 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-06-22 01:08:13,276 INFO L383 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2020-06-22 01:08:13,281 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states. [2020-06-22 01:08:13,306 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:13,306 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:13,306 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:13,315 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:13,315 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:13,315 INFO L442 BuchiCegarLoop]: ======== Iteration 1============ [2020-06-22 01:08:13,315 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states. [2020-06-22 01:08:13,322 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:13,322 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:13,322 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:13,324 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:13,324 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:13,330 INFO L794 eck$LassoCheckResult]: Stem: 58#ULTIMATE.startENTRYtrue [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 54#L165true [913] L165-->L172-1: Formula: (and (= v_~m_st~0_4 2) (< v_~m_i~0_4 1)) InVars {~m_i~0=v_~m_i~0_4} OutVars{~m_st~0=v_~m_st~0_4, ~m_i~0=v_~m_i~0_4} AuxVars[] AssignedVars[~m_st~0] 21#L172-1true [915] L172-1-->L177-1: Formula: (and (> 1 v_~t1_i~0_4) (= v_~t1_st~0_3 2)) InVars {~t1_i~0=v_~t1_i~0_4} OutVars{~t1_st~0=v_~t1_st~0_3, ~t1_i~0=v_~t1_i~0_4} AuxVars[] AssignedVars[~t1_st~0] 27#L177-1true [654] L177-1-->L261-1: Formula: (and (= 0 v_~M_E~0_3) (= v_~M_E~0_2 1)) InVars {~M_E~0=v_~M_E~0_3} OutVars{~M_E~0=v_~M_E~0_2} AuxVars[] AssignedVars[~M_E~0] 88#L261-1true [781] L261-1-->L266-1: Formula: (and (= v_~T1_E~0_2 1) (= 0 v_~T1_E~0_3)) InVars {~T1_E~0=v_~T1_E~0_3} OutVars{~T1_E~0=v_~T1_E~0_2} AuxVars[] AssignedVars[~T1_E~0] 102#L266-1true [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 25#L271-1true [923] L271-1-->L276-1: Formula: (< v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 29#L276-1true [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 73#L126true [755] L126-->L127: Formula: (= v_~m_pc~0_2 1) InVars {~m_pc~0=v_~m_pc~0_2} OutVars{~m_pc~0=v_~m_pc~0_2} AuxVars[] AssignedVars[] 52#L127true [712] L127-->L137: Formula: (and (= v_~E_M~0_8 1) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_4 1)) InVars {~E_M~0=v_~E_M~0_8} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_4, ~E_M~0=v_~E_M~0_8} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 74#L137true [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 5#L321true [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 8#L321-2true [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 95#L145true [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 89#L145-2true [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 96#L156true [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 9#L329true [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 13#L329-2true [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 59#L289-1true [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 61#L294-1true [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 10#L299-1true [943] L299-1-->L430-1: Formula: (> 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 34#L430-1true [2020-06-22 01:08:13,332 INFO L796 eck$LassoCheckResult]: Loop: 34#L430-1true [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 108#L236true [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 50#L190true [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 30#L202true [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 86#L217true [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 83#L261-2true [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 80#L261-4true [950] L261-4-->L266-3: Formula: (< v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 97#L266-3true [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 23#L271-3true [646] L271-3-->L276-3: Formula: (and (= 0 v_~E_1~0_22) (= v_~E_1~0_21 1)) InVars {~E_1~0=v_~E_1~0_22} OutVars{~E_1~0=v_~E_1~0_21} AuxVars[] AssignedVars[~E_1~0] 28#L276-3true [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 77#L126-9true [763] L126-9-->L127-3: Formula: (= v_~m_pc~0_13 1) InVars {~m_pc~0=v_~m_pc~0_13} OutVars{~m_pc~0=v_~m_pc~0_13} AuxVars[] AssignedVars[] 35#L127-3true [670] L127-3-->L137-3: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_20 1) (= 1 v_~E_M~0_22)) InVars {~E_M~0=v_~E_M~0_22} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_20, ~E_M~0=v_~E_M~0_22} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 65#L137-3true [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 93#L321-9true [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 98#L321-11true [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 72#L145-9true [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 66#L145-11true [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 115#L156-3true [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 7#L329-9true [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 104#L329-11true [1008] L329-11-->L289-3: Formula: (< v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 51#L289-3true [1012] L289-3-->L294-3: Formula: (< v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 84#L294-3true [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 99#L299-3true [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 17#L304-3true [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 48#L190-1true [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 19#L202-1true [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 47#L449true [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 49#L449-1true [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 45#L190-2true [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 18#L202-2true [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 76#L404true [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 32#L411true [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 34#L430-1true [2020-06-22 01:08:13,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:13,339 INFO L82 PathProgramCache]: Analyzing trace with hash 1434516410, now seen corresponding path program 1 times [2020-06-22 01:08:13,340 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:13,341 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:13,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:13,361 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:13,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:13,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:13,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:13,438 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:13,439 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:13,443 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:13,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:13,444 INFO L82 PathProgramCache]: Analyzing trace with hash 88454859, now seen corresponding path program 1 times [2020-06-22 01:08:13,444 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:13,444 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:13,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:13,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:13,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:13,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:13,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:13,487 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:13,487 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:13,489 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:13,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:13,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:13,505 INFO L87 Difference]: Start difference. First operand 114 states. Second operand 3 states. [2020-06-22 01:08:13,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:13,727 INFO L93 Difference]: Finished difference Result 114 states and 256 transitions. [2020-06-22 01:08:13,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:13,731 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 256 transitions. [2020-06-22 01:08:13,735 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:13,742 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 256 transitions. [2020-06-22 01:08:13,743 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 114 [2020-06-22 01:08:13,744 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 114 [2020-06-22 01:08:13,745 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 256 transitions. [2020-06-22 01:08:13,746 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:13,746 INFO L706 BuchiCegarLoop]: Abstraction has 114 states and 256 transitions. [2020-06-22 01:08:13,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 256 transitions. [2020-06-22 01:08:13,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2020-06-22 01:08:13,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2020-06-22 01:08:13,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 256 transitions. [2020-06-22 01:08:13,786 INFO L729 BuchiCegarLoop]: Abstraction has 114 states and 256 transitions. [2020-06-22 01:08:13,786 INFO L609 BuchiCegarLoop]: Abstraction has 114 states and 256 transitions. [2020-06-22 01:08:13,786 INFO L442 BuchiCegarLoop]: ======== Iteration 2============ [2020-06-22 01:08:13,787 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states and 256 transitions. [2020-06-22 01:08:13,789 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:13,789 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:13,789 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:13,791 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:13,791 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:13,792 INFO L794 eck$LassoCheckResult]: Stem: 326#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 325#L165 [912] L165-->L172-1: Formula: (and (= v_~m_st~0_4 2) (> v_~m_i~0_4 1)) InVars {~m_i~0=v_~m_i~0_4} OutVars{~m_st~0=v_~m_st~0_4, ~m_i~0=v_~m_i~0_4} AuxVars[] AssignedVars[~m_st~0] 270#L172-1 [915] L172-1-->L177-1: Formula: (and (> 1 v_~t1_i~0_4) (= v_~t1_st~0_3 2)) InVars {~t1_i~0=v_~t1_i~0_4} OutVars{~t1_st~0=v_~t1_st~0_3, ~t1_i~0=v_~t1_i~0_4} AuxVars[] AssignedVars[~t1_st~0] 271#L177-1 [654] L177-1-->L261-1: Formula: (and (= 0 v_~M_E~0_3) (= v_~M_E~0_2 1)) InVars {~M_E~0=v_~M_E~0_3} OutVars{~M_E~0=v_~M_E~0_2} AuxVars[] AssignedVars[~M_E~0] 280#L261-1 [781] L261-1-->L266-1: Formula: (and (= v_~T1_E~0_2 1) (= 0 v_~T1_E~0_3)) InVars {~T1_E~0=v_~T1_E~0_3} OutVars{~T1_E~0=v_~T1_E~0_2} AuxVars[] AssignedVars[~T1_E~0] 345#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 277#L271-1 [923] L271-1-->L276-1: Formula: (< v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 278#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 282#L126 [755] L126-->L127: Formula: (= v_~m_pc~0_2 1) InVars {~m_pc~0=v_~m_pc~0_2} OutVars{~m_pc~0=v_~m_pc~0_2} AuxVars[] AssignedVars[] 319#L127 [712] L127-->L137: Formula: (and (= v_~E_M~0_8 1) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_4 1)) InVars {~E_M~0=v_~E_M~0_8} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_4, ~E_M~0=v_~E_M~0_8} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 320#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 243#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 244#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 248#L145 [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 313#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 314#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 249#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 250#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 257#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 327#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 251#L299-1 [943] L299-1-->L430-1: Formula: (> 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 252#L430-1 [2020-06-22 01:08:13,793 INFO L796 eck$LassoCheckResult]: Loop: 252#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 289#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 316#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 276#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 283#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 343#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 339#L261-4 [950] L261-4-->L266-3: Formula: (< v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 340#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 273#L271-3 [646] L271-3-->L276-3: Formula: (and (= 0 v_~E_1~0_22) (= v_~E_1~0_21 1)) InVars {~E_1~0=v_~E_1~0_22} OutVars{~E_1~0=v_~E_1~0_21} AuxVars[] AssignedVars[~E_1~0] 274#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 281#L126-9 [763] L126-9-->L127-3: Formula: (= v_~m_pc~0_13 1) InVars {~m_pc~0=v_~m_pc~0_13} OutVars{~m_pc~0=v_~m_pc~0_13} AuxVars[] AssignedVars[] 290#L127-3 [670] L127-3-->L137-3: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_20 1) (= 1 v_~E_M~0_22)) InVars {~E_M~0=v_~E_M~0_22} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_20, ~E_M~0=v_~E_M~0_22} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 292#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 332#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 348#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 337#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 304#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 303#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 246#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 247#L329-11 [1008] L329-11-->L289-3: Formula: (< v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 317#L289-3 [1012] L289-3-->L294-3: Formula: (< v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 318#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 344#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 263#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 264#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 267#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 268#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 301#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 311#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 265#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 266#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 285#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 252#L430-1 [2020-06-22 01:08:13,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:13,794 INFO L82 PathProgramCache]: Analyzing trace with hash 1843340635, now seen corresponding path program 1 times [2020-06-22 01:08:13,794 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:13,794 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:13,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:13,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:13,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:13,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:13,835 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:13,835 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:13,835 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:13,836 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:13,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:13,836 INFO L82 PathProgramCache]: Analyzing trace with hash 88454859, now seen corresponding path program 2 times [2020-06-22 01:08:13,836 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:13,836 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:13,838 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:13,838 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:13,838 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:13,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:13,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:13,875 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:13,875 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:13,875 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:13,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:13,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:13,876 INFO L87 Difference]: Start difference. First operand 114 states and 256 transitions. cyclomatic complexity: 143 Second operand 3 states. [2020-06-22 01:08:14,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:14,071 INFO L93 Difference]: Finished difference Result 114 states and 255 transitions. [2020-06-22 01:08:14,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:14,073 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 255 transitions. [2020-06-22 01:08:14,075 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:14,077 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 255 transitions. [2020-06-22 01:08:14,077 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 114 [2020-06-22 01:08:14,078 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 114 [2020-06-22 01:08:14,078 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 255 transitions. [2020-06-22 01:08:14,079 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:14,079 INFO L706 BuchiCegarLoop]: Abstraction has 114 states and 255 transitions. [2020-06-22 01:08:14,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 255 transitions. [2020-06-22 01:08:14,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2020-06-22 01:08:14,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2020-06-22 01:08:14,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 255 transitions. [2020-06-22 01:08:14,087 INFO L729 BuchiCegarLoop]: Abstraction has 114 states and 255 transitions. [2020-06-22 01:08:14,087 INFO L609 BuchiCegarLoop]: Abstraction has 114 states and 255 transitions. [2020-06-22 01:08:14,087 INFO L442 BuchiCegarLoop]: ======== Iteration 3============ [2020-06-22 01:08:14,088 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states and 255 transitions. [2020-06-22 01:08:14,089 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:14,089 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:14,089 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:14,091 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:14,091 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:14,091 INFO L794 eck$LassoCheckResult]: Stem: 562#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 561#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 506#L172-1 [915] L172-1-->L177-1: Formula: (and (> 1 v_~t1_i~0_4) (= v_~t1_st~0_3 2)) InVars {~t1_i~0=v_~t1_i~0_4} OutVars{~t1_st~0=v_~t1_st~0_3, ~t1_i~0=v_~t1_i~0_4} AuxVars[] AssignedVars[~t1_st~0] 507#L177-1 [654] L177-1-->L261-1: Formula: (and (= 0 v_~M_E~0_3) (= v_~M_E~0_2 1)) InVars {~M_E~0=v_~M_E~0_3} OutVars{~M_E~0=v_~M_E~0_2} AuxVars[] AssignedVars[~M_E~0] 516#L261-1 [781] L261-1-->L266-1: Formula: (and (= v_~T1_E~0_2 1) (= 0 v_~T1_E~0_3)) InVars {~T1_E~0=v_~T1_E~0_3} OutVars{~T1_E~0=v_~T1_E~0_2} AuxVars[] AssignedVars[~T1_E~0] 581#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 513#L271-1 [923] L271-1-->L276-1: Formula: (< v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 514#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 518#L126 [755] L126-->L127: Formula: (= v_~m_pc~0_2 1) InVars {~m_pc~0=v_~m_pc~0_2} OutVars{~m_pc~0=v_~m_pc~0_2} AuxVars[] AssignedVars[] 555#L127 [712] L127-->L137: Formula: (and (= v_~E_M~0_8 1) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_4 1)) InVars {~E_M~0=v_~E_M~0_8} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_4, ~E_M~0=v_~E_M~0_8} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 556#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 479#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 480#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 484#L145 [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 549#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 550#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 485#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 486#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 493#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 563#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 487#L299-1 [943] L299-1-->L430-1: Formula: (> 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 488#L430-1 [2020-06-22 01:08:14,092 INFO L796 eck$LassoCheckResult]: Loop: 488#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 525#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 552#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 512#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 519#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 579#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 575#L261-4 [950] L261-4-->L266-3: Formula: (< v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 576#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 509#L271-3 [646] L271-3-->L276-3: Formula: (and (= 0 v_~E_1~0_22) (= v_~E_1~0_21 1)) InVars {~E_1~0=v_~E_1~0_22} OutVars{~E_1~0=v_~E_1~0_21} AuxVars[] AssignedVars[~E_1~0] 510#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 517#L126-9 [763] L126-9-->L127-3: Formula: (= v_~m_pc~0_13 1) InVars {~m_pc~0=v_~m_pc~0_13} OutVars{~m_pc~0=v_~m_pc~0_13} AuxVars[] AssignedVars[] 526#L127-3 [670] L127-3-->L137-3: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_20 1) (= 1 v_~E_M~0_22)) InVars {~E_M~0=v_~E_M~0_22} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_20, ~E_M~0=v_~E_M~0_22} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 528#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 568#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 584#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 573#L145-9 [753] L145-9-->L146-3: Formula: (= v_~t1_pc~0_15 1) InVars {~t1_pc~0=v_~t1_pc~0_15} OutVars{~t1_pc~0=v_~t1_pc~0_15} AuxVars[] AssignedVars[] 538#L146-3 [688] L146-3-->L156-3: Formula: (and (= 1 v_~E_1~0_24) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28 1)) InVars {~E_1~0=v_~E_1~0_24} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28, ~E_1~0=v_~E_1~0_24} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 539#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 482#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 483#L329-11 [1008] L329-11-->L289-3: Formula: (< v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 553#L289-3 [1012] L289-3-->L294-3: Formula: (< v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 554#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 580#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 499#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 500#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 503#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 504#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 537#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 547#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 501#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 502#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 521#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 488#L430-1 [2020-06-22 01:08:14,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:14,093 INFO L82 PathProgramCache]: Analyzing trace with hash -1266786789, now seen corresponding path program 1 times [2020-06-22 01:08:14,094 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:14,094 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:14,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,095 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:14,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:14,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:14,114 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:14,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:14,115 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:14,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:14,115 INFO L82 PathProgramCache]: Analyzing trace with hash 512280887, now seen corresponding path program 1 times [2020-06-22 01:08:14,115 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:14,115 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:14,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:14,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:14,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:14,147 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:14,147 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:14,148 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:14,148 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:14,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:14,148 INFO L87 Difference]: Start difference. First operand 114 states and 255 transitions. cyclomatic complexity: 142 Second operand 3 states. [2020-06-22 01:08:14,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:14,307 INFO L93 Difference]: Finished difference Result 114 states and 254 transitions. [2020-06-22 01:08:14,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:14,308 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 254 transitions. [2020-06-22 01:08:14,309 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:14,311 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 254 transitions. [2020-06-22 01:08:14,311 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 114 [2020-06-22 01:08:14,312 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 114 [2020-06-22 01:08:14,312 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 254 transitions. [2020-06-22 01:08:14,312 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:14,313 INFO L706 BuchiCegarLoop]: Abstraction has 114 states and 254 transitions. [2020-06-22 01:08:14,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 254 transitions. [2020-06-22 01:08:14,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2020-06-22 01:08:14,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2020-06-22 01:08:14,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 254 transitions. [2020-06-22 01:08:14,320 INFO L729 BuchiCegarLoop]: Abstraction has 114 states and 254 transitions. [2020-06-22 01:08:14,320 INFO L609 BuchiCegarLoop]: Abstraction has 114 states and 254 transitions. [2020-06-22 01:08:14,320 INFO L442 BuchiCegarLoop]: ======== Iteration 4============ [2020-06-22 01:08:14,320 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states and 254 transitions. [2020-06-22 01:08:14,321 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:14,321 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:14,321 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:14,322 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:14,322 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:14,323 INFO L794 eck$LassoCheckResult]: Stem: 798#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 797#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 742#L172-1 [914] L172-1-->L177-1: Formula: (and (< 1 v_~t1_i~0_4) (= v_~t1_st~0_3 2)) InVars {~t1_i~0=v_~t1_i~0_4} OutVars{~t1_st~0=v_~t1_st~0_3, ~t1_i~0=v_~t1_i~0_4} AuxVars[] AssignedVars[~t1_st~0] 743#L177-1 [654] L177-1-->L261-1: Formula: (and (= 0 v_~M_E~0_3) (= v_~M_E~0_2 1)) InVars {~M_E~0=v_~M_E~0_3} OutVars{~M_E~0=v_~M_E~0_2} AuxVars[] AssignedVars[~M_E~0] 752#L261-1 [781] L261-1-->L266-1: Formula: (and (= v_~T1_E~0_2 1) (= 0 v_~T1_E~0_3)) InVars {~T1_E~0=v_~T1_E~0_3} OutVars{~T1_E~0=v_~T1_E~0_2} AuxVars[] AssignedVars[~T1_E~0] 817#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 749#L271-1 [923] L271-1-->L276-1: Formula: (< v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 750#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 754#L126 [755] L126-->L127: Formula: (= v_~m_pc~0_2 1) InVars {~m_pc~0=v_~m_pc~0_2} OutVars{~m_pc~0=v_~m_pc~0_2} AuxVars[] AssignedVars[] 791#L127 [712] L127-->L137: Formula: (and (= v_~E_M~0_8 1) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_4 1)) InVars {~E_M~0=v_~E_M~0_8} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_4, ~E_M~0=v_~E_M~0_8} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 792#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 715#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 716#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 720#L145 [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 785#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 786#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 721#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 722#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 729#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 799#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 723#L299-1 [943] L299-1-->L430-1: Formula: (> 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 724#L430-1 [2020-06-22 01:08:14,325 INFO L796 eck$LassoCheckResult]: Loop: 724#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 761#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 788#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 748#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 755#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 815#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 811#L261-4 [950] L261-4-->L266-3: Formula: (< v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 812#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 745#L271-3 [646] L271-3-->L276-3: Formula: (and (= 0 v_~E_1~0_22) (= v_~E_1~0_21 1)) InVars {~E_1~0=v_~E_1~0_22} OutVars{~E_1~0=v_~E_1~0_21} AuxVars[] AssignedVars[~E_1~0] 746#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 753#L126-9 [763] L126-9-->L127-3: Formula: (= v_~m_pc~0_13 1) InVars {~m_pc~0=v_~m_pc~0_13} OutVars{~m_pc~0=v_~m_pc~0_13} AuxVars[] AssignedVars[] 762#L127-3 [670] L127-3-->L137-3: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_20 1) (= 1 v_~E_M~0_22)) InVars {~E_M~0=v_~E_M~0_22} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_20, ~E_M~0=v_~E_M~0_22} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 764#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 804#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 820#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 809#L145-9 [753] L145-9-->L146-3: Formula: (= v_~t1_pc~0_15 1) InVars {~t1_pc~0=v_~t1_pc~0_15} OutVars{~t1_pc~0=v_~t1_pc~0_15} AuxVars[] AssignedVars[] 774#L146-3 [688] L146-3-->L156-3: Formula: (and (= 1 v_~E_1~0_24) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28 1)) InVars {~E_1~0=v_~E_1~0_24} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28, ~E_1~0=v_~E_1~0_24} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 775#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 718#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 719#L329-11 [1008] L329-11-->L289-3: Formula: (< v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 789#L289-3 [1012] L289-3-->L294-3: Formula: (< v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 790#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 816#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 735#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 736#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 739#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 740#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 773#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 783#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 737#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 738#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 757#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 724#L430-1 [2020-06-22 01:08:14,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:14,325 INFO L82 PathProgramCache]: Analyzing trace with hash -422314918, now seen corresponding path program 1 times [2020-06-22 01:08:14,325 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:14,325 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:14,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,326 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:14,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:14,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:14,344 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:14,344 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:14,344 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:14,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:14,344 INFO L82 PathProgramCache]: Analyzing trace with hash 512280887, now seen corresponding path program 2 times [2020-06-22 01:08:14,345 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:14,345 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:14,346 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,346 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:14,346 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:14,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:14,393 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:14,393 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:14,393 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:14,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:14,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:14,394 INFO L87 Difference]: Start difference. First operand 114 states and 254 transitions. cyclomatic complexity: 141 Second operand 3 states. [2020-06-22 01:08:14,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:14,538 INFO L93 Difference]: Finished difference Result 114 states and 253 transitions. [2020-06-22 01:08:14,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:14,538 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 253 transitions. [2020-06-22 01:08:14,540 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:14,541 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 253 transitions. [2020-06-22 01:08:14,542 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 114 [2020-06-22 01:08:14,560 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 114 [2020-06-22 01:08:14,560 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 253 transitions. [2020-06-22 01:08:14,561 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:14,561 INFO L706 BuchiCegarLoop]: Abstraction has 114 states and 253 transitions. [2020-06-22 01:08:14,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 253 transitions. [2020-06-22 01:08:14,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2020-06-22 01:08:14,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2020-06-22 01:08:14,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 253 transitions. [2020-06-22 01:08:14,568 INFO L729 BuchiCegarLoop]: Abstraction has 114 states and 253 transitions. [2020-06-22 01:08:14,568 INFO L609 BuchiCegarLoop]: Abstraction has 114 states and 253 transitions. [2020-06-22 01:08:14,569 INFO L442 BuchiCegarLoop]: ======== Iteration 5============ [2020-06-22 01:08:14,569 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states and 253 transitions. [2020-06-22 01:08:14,570 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2020-06-22 01:08:14,570 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:14,570 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:14,571 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:14,571 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:14,572 INFO L794 eck$LassoCheckResult]: Stem: 1034#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 1033#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 978#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 979#L177-1 [654] L177-1-->L261-1: Formula: (and (= 0 v_~M_E~0_3) (= v_~M_E~0_2 1)) InVars {~M_E~0=v_~M_E~0_3} OutVars{~M_E~0=v_~M_E~0_2} AuxVars[] AssignedVars[~M_E~0] 988#L261-1 [781] L261-1-->L266-1: Formula: (and (= v_~T1_E~0_2 1) (= 0 v_~T1_E~0_3)) InVars {~T1_E~0=v_~T1_E~0_3} OutVars{~T1_E~0=v_~T1_E~0_2} AuxVars[] AssignedVars[~T1_E~0] 1053#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 985#L271-1 [923] L271-1-->L276-1: Formula: (< v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 986#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 990#L126 [755] L126-->L127: Formula: (= v_~m_pc~0_2 1) InVars {~m_pc~0=v_~m_pc~0_2} OutVars{~m_pc~0=v_~m_pc~0_2} AuxVars[] AssignedVars[] 1027#L127 [712] L127-->L137: Formula: (and (= v_~E_M~0_8 1) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_4 1)) InVars {~E_M~0=v_~E_M~0_8} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_4, ~E_M~0=v_~E_M~0_8} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 1028#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 951#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 952#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 956#L145 [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 1021#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 1022#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 957#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 958#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 965#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 1035#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 959#L299-1 [943] L299-1-->L430-1: Formula: (> 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 960#L430-1 [2020-06-22 01:08:14,573 INFO L796 eck$LassoCheckResult]: Loop: 960#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 997#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 1024#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 984#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 991#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 1051#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 1047#L261-4 [950] L261-4-->L266-3: Formula: (< v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 1048#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 981#L271-3 [646] L271-3-->L276-3: Formula: (and (= 0 v_~E_1~0_22) (= v_~E_1~0_21 1)) InVars {~E_1~0=v_~E_1~0_22} OutVars{~E_1~0=v_~E_1~0_21} AuxVars[] AssignedVars[~E_1~0] 982#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 989#L126-9 [763] L126-9-->L127-3: Formula: (= v_~m_pc~0_13 1) InVars {~m_pc~0=v_~m_pc~0_13} OutVars{~m_pc~0=v_~m_pc~0_13} AuxVars[] AssignedVars[] 998#L127-3 [670] L127-3-->L137-3: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_20 1) (= 1 v_~E_M~0_22)) InVars {~E_M~0=v_~E_M~0_22} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_20, ~E_M~0=v_~E_M~0_22} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 1000#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 1040#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 1056#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 1045#L145-9 [753] L145-9-->L146-3: Formula: (= v_~t1_pc~0_15 1) InVars {~t1_pc~0=v_~t1_pc~0_15} OutVars{~t1_pc~0=v_~t1_pc~0_15} AuxVars[] AssignedVars[] 1010#L146-3 [688] L146-3-->L156-3: Formula: (and (= 1 v_~E_1~0_24) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28 1)) InVars {~E_1~0=v_~E_1~0_24} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28, ~E_1~0=v_~E_1~0_24} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 1011#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 954#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 955#L329-11 [1008] L329-11-->L289-3: Formula: (< v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 1025#L289-3 [1012] L289-3-->L294-3: Formula: (< v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 1026#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 1052#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 971#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 972#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 975#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 976#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 1009#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 1019#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 973#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 974#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 993#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 960#L430-1 [2020-06-22 01:08:14,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:14,573 INFO L82 PathProgramCache]: Analyzing trace with hash 1640767306, now seen corresponding path program 1 times [2020-06-22 01:08:14,573 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:14,573 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:14,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,574 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:14,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:14,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:14,591 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:14,591 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:14,591 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:14,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:14,592 INFO L82 PathProgramCache]: Analyzing trace with hash 512280887, now seen corresponding path program 3 times [2020-06-22 01:08:14,592 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:14,592 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:14,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,593 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:14,593 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:14,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:14,615 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:14,615 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:14,615 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:14,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:14,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:14,616 INFO L87 Difference]: Start difference. First operand 114 states and 253 transitions. cyclomatic complexity: 140 Second operand 3 states. [2020-06-22 01:08:14,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:14,853 INFO L93 Difference]: Finished difference Result 193 states and 421 transitions. [2020-06-22 01:08:14,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:14,854 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 421 transitions. [2020-06-22 01:08:14,856 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 170 [2020-06-22 01:08:14,858 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 193 states and 421 transitions. [2020-06-22 01:08:14,859 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 193 [2020-06-22 01:08:14,859 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 193 [2020-06-22 01:08:14,859 INFO L73 IsDeterministic]: Start isDeterministic. Operand 193 states and 421 transitions. [2020-06-22 01:08:14,860 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:14,860 INFO L706 BuchiCegarLoop]: Abstraction has 193 states and 421 transitions. [2020-06-22 01:08:14,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states and 421 transitions. [2020-06-22 01:08:14,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 193. [2020-06-22 01:08:14,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2020-06-22 01:08:14,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 421 transitions. [2020-06-22 01:08:14,870 INFO L729 BuchiCegarLoop]: Abstraction has 193 states and 421 transitions. [2020-06-22 01:08:14,870 INFO L609 BuchiCegarLoop]: Abstraction has 193 states and 421 transitions. [2020-06-22 01:08:14,870 INFO L442 BuchiCegarLoop]: ======== Iteration 6============ [2020-06-22 01:08:14,871 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 193 states and 421 transitions. [2020-06-22 01:08:14,872 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 170 [2020-06-22 01:08:14,872 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:14,872 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:14,873 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:14,873 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:14,874 INFO L794 eck$LassoCheckResult]: Stem: 1351#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 1350#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 1294#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 1295#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 1304#L261-1 [781] L261-1-->L266-1: Formula: (and (= v_~T1_E~0_2 1) (= 0 v_~T1_E~0_3)) InVars {~T1_E~0=v_~T1_E~0_3} OutVars{~T1_E~0=v_~T1_E~0_2} AuxVars[] AssignedVars[~T1_E~0] 1372#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 1301#L271-1 [923] L271-1-->L276-1: Formula: (< v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 1302#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 1306#L126 [755] L126-->L127: Formula: (= v_~m_pc~0_2 1) InVars {~m_pc~0=v_~m_pc~0_2} OutVars{~m_pc~0=v_~m_pc~0_2} AuxVars[] AssignedVars[] 1344#L127 [712] L127-->L137: Formula: (and (= v_~E_M~0_8 1) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_4 1)) InVars {~E_M~0=v_~E_M~0_8} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_4, ~E_M~0=v_~E_M~0_8} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 1345#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 1266#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 1267#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 1271#L145 [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 1338#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 1339#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 1272#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 1273#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 1280#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 1352#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 1274#L299-1 [943] L299-1-->L430-1: Formula: (> 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 1275#L430-1 [2020-06-22 01:08:14,875 INFO L796 eck$LassoCheckResult]: Loop: 1275#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 1313#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 1341#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 1300#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 1307#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 1369#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 1370#L261-4 [950] L261-4-->L266-3: Formula: (< v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 1444#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 1443#L271-3 [646] L271-3-->L276-3: Formula: (and (= 0 v_~E_1~0_22) (= v_~E_1~0_21 1)) InVars {~E_1~0=v_~E_1~0_22} OutVars{~E_1~0=v_~E_1~0_21} AuxVars[] AssignedVars[~E_1~0] 1442#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 1441#L126-9 [763] L126-9-->L127-3: Formula: (= v_~m_pc~0_13 1) InVars {~m_pc~0=v_~m_pc~0_13} OutVars{~m_pc~0=v_~m_pc~0_13} AuxVars[] AssignedVars[] 1440#L127-3 [670] L127-3-->L137-3: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_20 1) (= 1 v_~E_M~0_22)) InVars {~E_M~0=v_~E_M~0_22} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_20, ~E_M~0=v_~E_M~0_22} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 1438#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 1437#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 1436#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 1435#L145-9 [753] L145-9-->L146-3: Formula: (= v_~t1_pc~0_15 1) InVars {~t1_pc~0=v_~t1_pc~0_15} OutVars{~t1_pc~0=v_~t1_pc~0_15} AuxVars[] AssignedVars[] 1433#L146-3 [688] L146-3-->L156-3: Formula: (and (= 1 v_~E_1~0_24) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28 1)) InVars {~E_1~0=v_~E_1~0_24} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28, ~E_1~0=v_~E_1~0_24} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 1432#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 1269#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 1270#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 1377#L289-3 [1012] L289-3-->L294-3: Formula: (< v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 1412#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 1411#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 1410#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 1409#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 1406#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 1405#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 1404#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 1403#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 1401#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 1363#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 1309#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 1275#L430-1 [2020-06-22 01:08:14,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:14,875 INFO L82 PathProgramCache]: Analyzing trace with hash 1403743523, now seen corresponding path program 1 times [2020-06-22 01:08:14,875 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:14,875 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:14,876 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,876 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:14,877 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:14,895 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:14,896 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:14,896 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:14,896 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:14,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:14,896 INFO L82 PathProgramCache]: Analyzing trace with hash 218877880, now seen corresponding path program 1 times [2020-06-22 01:08:14,897 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:14,897 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:14,897 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:14,898 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:14,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:14,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:14,933 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:14,933 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:14,933 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:14,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:14,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:14,934 INFO L87 Difference]: Start difference. First operand 193 states and 421 transitions. cyclomatic complexity: 229 Second operand 3 states. [2020-06-22 01:08:15,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:15,104 INFO L93 Difference]: Finished difference Result 193 states and 405 transitions. [2020-06-22 01:08:15,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:15,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 405 transitions. [2020-06-22 01:08:15,107 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 170 [2020-06-22 01:08:15,109 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 193 states and 405 transitions. [2020-06-22 01:08:15,109 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 193 [2020-06-22 01:08:15,109 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 193 [2020-06-22 01:08:15,109 INFO L73 IsDeterministic]: Start isDeterministic. Operand 193 states and 405 transitions. [2020-06-22 01:08:15,110 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:15,110 INFO L706 BuchiCegarLoop]: Abstraction has 193 states and 405 transitions. [2020-06-22 01:08:15,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states and 405 transitions. [2020-06-22 01:08:15,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 193. [2020-06-22 01:08:15,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2020-06-22 01:08:15,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 405 transitions. [2020-06-22 01:08:15,117 INFO L729 BuchiCegarLoop]: Abstraction has 193 states and 405 transitions. [2020-06-22 01:08:15,117 INFO L609 BuchiCegarLoop]: Abstraction has 193 states and 405 transitions. [2020-06-22 01:08:15,117 INFO L442 BuchiCegarLoop]: ======== Iteration 7============ [2020-06-22 01:08:15,118 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 193 states and 405 transitions. [2020-06-22 01:08:15,119 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 170 [2020-06-22 01:08:15,119 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:15,119 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:15,120 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:15,120 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:15,121 INFO L794 eck$LassoCheckResult]: Stem: 1743#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 1742#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 1687#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 1688#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 1697#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 1763#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 1694#L271-1 [923] L271-1-->L276-1: Formula: (< v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 1695#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 1699#L126 [755] L126-->L127: Formula: (= v_~m_pc~0_2 1) InVars {~m_pc~0=v_~m_pc~0_2} OutVars{~m_pc~0=v_~m_pc~0_2} AuxVars[] AssignedVars[] 1736#L127 [712] L127-->L137: Formula: (and (= v_~E_M~0_8 1) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_4 1)) InVars {~E_M~0=v_~E_M~0_8} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_4, ~E_M~0=v_~E_M~0_8} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 1737#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 1661#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 1662#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 1665#L145 [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 1731#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 1732#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 1668#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 1669#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 1674#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 1744#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 1670#L299-1 [943] L299-1-->L430-1: Formula: (> 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 1671#L430-1 [2020-06-22 01:08:15,121 INFO L796 eck$LassoCheckResult]: Loop: 1671#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 1706#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 1735#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 1693#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 1700#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 1761#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 1762#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 1767#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 1690#L271-3 [646] L271-3-->L276-3: Formula: (and (= 0 v_~E_1~0_22) (= v_~E_1~0_21 1)) InVars {~E_1~0=v_~E_1~0_22} OutVars{~E_1~0=v_~E_1~0_21} AuxVars[] AssignedVars[~E_1~0] 1691#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 1698#L126-9 [763] L126-9-->L127-3: Formula: (= v_~m_pc~0_13 1) InVars {~m_pc~0=v_~m_pc~0_13} OutVars{~m_pc~0=v_~m_pc~0_13} AuxVars[] AssignedVars[] 1707#L127-3 [670] L127-3-->L137-3: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_20 1) (= 1 v_~E_M~0_22)) InVars {~E_M~0=v_~E_M~0_22} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_20, ~E_M~0=v_~E_M~0_22} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 1709#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 1749#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 1766#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 1754#L145-9 [753] L145-9-->L146-3: Formula: (= v_~t1_pc~0_15 1) InVars {~t1_pc~0=v_~t1_pc~0_15} OutVars{~t1_pc~0=v_~t1_pc~0_15} AuxVars[] AssignedVars[] 1719#L146-3 [688] L146-3-->L156-3: Formula: (and (= 1 v_~E_1~0_24) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28 1)) InVars {~E_1~0=v_~E_1~0_24} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_28, ~E_1~0=v_~E_1~0_24} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 1720#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 1663#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 1664#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 1733#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 1734#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 1760#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 1679#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 1680#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 1684#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 1685#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 1718#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 1728#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 1682#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 1683#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 1702#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 1671#L430-1 [2020-06-22 01:08:15,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:15,122 INFO L82 PathProgramCache]: Analyzing trace with hash -818079315, now seen corresponding path program 1 times [2020-06-22 01:08:15,122 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:15,122 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:15,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:15,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:15,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:15,146 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:15,146 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:15,146 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:15,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:15,147 INFO L82 PathProgramCache]: Analyzing trace with hash 378980406, now seen corresponding path program 1 times [2020-06-22 01:08:15,147 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:15,147 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:15,148 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,148 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:15,148 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:15,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:15,171 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:15,171 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:15,172 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:15,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:15,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:15,172 INFO L87 Difference]: Start difference. First operand 193 states and 405 transitions. cyclomatic complexity: 213 Second operand 3 states. [2020-06-22 01:08:15,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:15,315 INFO L93 Difference]: Finished difference Result 201 states and 389 transitions. [2020-06-22 01:08:15,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:15,316 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 201 states and 389 transitions. [2020-06-22 01:08:15,318 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 178 [2020-06-22 01:08:15,319 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 201 states to 201 states and 389 transitions. [2020-06-22 01:08:15,320 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 201 [2020-06-22 01:08:15,320 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 201 [2020-06-22 01:08:15,320 INFO L73 IsDeterministic]: Start isDeterministic. Operand 201 states and 389 transitions. [2020-06-22 01:08:15,321 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:15,321 INFO L706 BuchiCegarLoop]: Abstraction has 201 states and 389 transitions. [2020-06-22 01:08:15,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states and 389 transitions. [2020-06-22 01:08:15,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 193. [2020-06-22 01:08:15,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2020-06-22 01:08:15,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 377 transitions. [2020-06-22 01:08:15,327 INFO L729 BuchiCegarLoop]: Abstraction has 193 states and 377 transitions. [2020-06-22 01:08:15,327 INFO L609 BuchiCegarLoop]: Abstraction has 193 states and 377 transitions. [2020-06-22 01:08:15,327 INFO L442 BuchiCegarLoop]: ======== Iteration 8============ [2020-06-22 01:08:15,327 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 193 states and 377 transitions. [2020-06-22 01:08:15,328 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 170 [2020-06-22 01:08:15,328 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:15,329 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:15,329 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:15,329 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:15,330 INFO L794 eck$LassoCheckResult]: Stem: 2142#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 2141#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 2090#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 2091#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 2100#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 2166#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 2097#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 2098#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 2102#L126 [755] L126-->L127: Formula: (= v_~m_pc~0_2 1) InVars {~m_pc~0=v_~m_pc~0_2} OutVars{~m_pc~0=v_~m_pc~0_2} AuxVars[] AssignedVars[] 2136#L127 [712] L127-->L137: Formula: (and (= v_~E_M~0_8 1) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_4 1)) InVars {~E_M~0=v_~E_M~0_8} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_4, ~E_M~0=v_~E_M~0_8} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 2137#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 2063#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 2064#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 2067#L145 [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 2132#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 2167#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 2068#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 2069#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 2076#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 2143#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 2070#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 2071#L430-1 [2020-06-22 01:08:15,331 INFO L796 eck$LassoCheckResult]: Loop: 2071#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 2109#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 2135#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 2096#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 2103#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 2164#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 2158#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 2159#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 2093#L271-3 [956] L271-3-->L276-3: Formula: (< 0 v_~E_1~0_23) InVars {~E_1~0=v_~E_1~0_23} OutVars{~E_1~0=v_~E_1~0_23} AuxVars[] AssignedVars[] 2094#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 2101#L126-9 [763] L126-9-->L127-3: Formula: (= v_~m_pc~0_13 1) InVars {~m_pc~0=v_~m_pc~0_13} OutVars{~m_pc~0=v_~m_pc~0_13} AuxVars[] AssignedVars[] 2110#L127-3 [670] L127-3-->L137-3: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_20 1) (= 1 v_~E_M~0_22)) InVars {~E_M~0=v_~E_M~0_22} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_20, ~E_M~0=v_~E_M~0_22} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 2112#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 2148#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 2170#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 2154#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 2123#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 2149#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 2065#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 2066#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 2133#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 2134#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 2163#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 2082#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 2083#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 2087#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 2088#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 2121#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 2129#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 2085#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 2086#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 2105#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 2071#L430-1 [2020-06-22 01:08:15,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:15,331 INFO L82 PathProgramCache]: Analyzing trace with hash 1969336171, now seen corresponding path program 1 times [2020-06-22 01:08:15,331 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:15,332 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:15,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,332 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:15,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:15,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:15,350 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:15,350 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:15,351 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:15,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:15,351 INFO L82 PathProgramCache]: Analyzing trace with hash 657897428, now seen corresponding path program 1 times [2020-06-22 01:08:15,351 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:15,351 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:15,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,352 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:15,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:15,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:15,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:15,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:15,379 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:15,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:15,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:15,380 INFO L87 Difference]: Start difference. First operand 193 states and 377 transitions. cyclomatic complexity: 185 Second operand 3 states. [2020-06-22 01:08:15,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:15,616 INFO L93 Difference]: Finished difference Result 345 states and 651 transitions. [2020-06-22 01:08:15,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:15,617 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 345 states and 651 transitions. [2020-06-22 01:08:15,619 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 323 [2020-06-22 01:08:15,622 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 345 states to 345 states and 651 transitions. [2020-06-22 01:08:15,622 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 345 [2020-06-22 01:08:15,622 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 345 [2020-06-22 01:08:15,623 INFO L73 IsDeterministic]: Start isDeterministic. Operand 345 states and 651 transitions. [2020-06-22 01:08:15,623 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:15,623 INFO L706 BuchiCegarLoop]: Abstraction has 345 states and 651 transitions. [2020-06-22 01:08:15,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states and 651 transitions. [2020-06-22 01:08:15,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 325. [2020-06-22 01:08:15,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325 states. [2020-06-22 01:08:15,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 615 transitions. [2020-06-22 01:08:15,632 INFO L729 BuchiCegarLoop]: Abstraction has 325 states and 615 transitions. [2020-06-22 01:08:15,632 INFO L609 BuchiCegarLoop]: Abstraction has 325 states and 615 transitions. [2020-06-22 01:08:15,632 INFO L442 BuchiCegarLoop]: ======== Iteration 9============ [2020-06-22 01:08:15,633 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 325 states and 615 transitions. [2020-06-22 01:08:15,634 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 303 [2020-06-22 01:08:15,634 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:15,635 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:15,635 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:15,636 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:15,636 INFO L794 eck$LassoCheckResult]: Stem: 2692#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 2687#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 2635#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 2636#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 2646#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 2725#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 2642#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 2643#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 2648#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 2701#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 2702#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 2609#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 2610#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 2613#L145 [931] L145-->L145-2: Formula: (> v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 2680#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 2726#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 2614#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 2615#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 2622#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 2693#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 2616#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 2617#L430-1 [2020-06-22 01:08:15,637 INFO L796 eck$LassoCheckResult]: Loop: 2617#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 2655#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 2684#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 2641#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 2649#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 2721#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 2722#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 2921#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 2638#L271-3 [956] L271-3-->L276-3: Formula: (< 0 v_~E_1~0_23) InVars {~E_1~0=v_~E_1~0_23} OutVars{~E_1~0=v_~E_1~0_23} AuxVars[] AssignedVars[] 2639#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 2647#L126-9 [964] L126-9-->L126-11: Formula: (< v_~m_pc~0_14 1) InVars {~m_pc~0=v_~m_pc~0_14} OutVars{~m_pc~0=v_~m_pc~0_14} AuxVars[] AssignedVars[] 2690#L126-11 [726] L126-11-->L137-3: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_21 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_21} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 2691#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 2699#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 2729#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 2708#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 2671#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 2700#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 2905#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 2901#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 2899#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 2898#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 2895#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 2887#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 2886#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 2884#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 2882#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 2681#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 2677#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 2634#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 2710#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 2651#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 2617#L430-1 [2020-06-22 01:08:15,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:15,637 INFO L82 PathProgramCache]: Analyzing trace with hash -277286606, now seen corresponding path program 1 times [2020-06-22 01:08:15,638 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:15,638 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:15,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,639 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:15,639 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:15,655 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:15,655 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:15,655 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:15,656 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:15,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:15,656 INFO L82 PathProgramCache]: Analyzing trace with hash -2018774301, now seen corresponding path program 1 times [2020-06-22 01:08:15,656 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:15,656 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:15,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:15,657 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:15,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:15,697 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:15,697 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:15,698 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:15,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:15,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:15,698 INFO L87 Difference]: Start difference. First operand 325 states and 615 transitions. cyclomatic complexity: 291 Second operand 3 states. [2020-06-22 01:08:15,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:15,911 INFO L93 Difference]: Finished difference Result 589 states and 1101 transitions. [2020-06-22 01:08:15,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:15,912 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 589 states and 1101 transitions. [2020-06-22 01:08:15,916 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 568 [2020-06-22 01:08:15,921 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 589 states to 589 states and 1101 transitions. [2020-06-22 01:08:15,921 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 589 [2020-06-22 01:08:15,922 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 589 [2020-06-22 01:08:15,922 INFO L73 IsDeterministic]: Start isDeterministic. Operand 589 states and 1101 transitions. [2020-06-22 01:08:15,923 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:15,923 INFO L706 BuchiCegarLoop]: Abstraction has 589 states and 1101 transitions. [2020-06-22 01:08:15,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 589 states and 1101 transitions. [2020-06-22 01:08:15,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 589 to 569. [2020-06-22 01:08:15,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 569 states. [2020-06-22 01:08:15,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 569 states to 569 states and 1073 transitions. [2020-06-22 01:08:15,938 INFO L729 BuchiCegarLoop]: Abstraction has 569 states and 1073 transitions. [2020-06-22 01:08:15,938 INFO L609 BuchiCegarLoop]: Abstraction has 569 states and 1073 transitions. [2020-06-22 01:08:15,938 INFO L442 BuchiCegarLoop]: ======== Iteration 10============ [2020-06-22 01:08:15,938 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 569 states and 1073 transitions. [2020-06-22 01:08:15,942 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 548 [2020-06-22 01:08:15,942 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:15,942 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:15,943 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:15,943 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:15,943 INFO L794 eck$LassoCheckResult]: Stem: 3614#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 3610#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 3557#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 3558#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 3568#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 3643#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 3564#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 3565#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 3570#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 3625#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 3626#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 3532#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 3533#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 3536#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 3644#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 3645#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 3539#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 3540#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 3545#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 3615#L294-1 [941] L294-1-->L299-1: Formula: (> 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 3541#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 3542#L430-1 [2020-06-22 01:08:15,944 INFO L796 eck$LassoCheckResult]: Loop: 3542#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 4032#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 4030#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 3571#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 3572#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 3640#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 3633#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 3634#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 3560#L271-3 [956] L271-3-->L276-3: Formula: (< 0 v_~E_1~0_23) InVars {~E_1~0=v_~E_1~0_23} OutVars{~E_1~0=v_~E_1~0_23} AuxVars[] AssignedVars[] 3561#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 3569#L126-9 [964] L126-9-->L126-11: Formula: (< v_~m_pc~0_14 1) InVars {~m_pc~0=v_~m_pc~0_14} OutVars{~m_pc~0=v_~m_pc~0_14} AuxVars[] AssignedVars[] 3612#L126-11 [726] L126-11-->L137-3: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_21 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_21} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 3613#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 3622#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 3650#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 3629#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 3623#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 3624#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 3534#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 3535#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 3653#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 4050#L294-3 [1014] L294-3-->L299-3: Formula: (> 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 4049#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 4048#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 4047#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 4045#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 4042#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 4041#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 4040#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 4037#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 4036#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 4035#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 3542#L430-1 [2020-06-22 01:08:15,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:15,944 INFO L82 PathProgramCache]: Analyzing trace with hash -2020096941, now seen corresponding path program 1 times [2020-06-22 01:08:15,945 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:15,945 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:15,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,946 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:15,946 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:15,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:15,979 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:15,979 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-06-22 01:08:15,979 INFO L799 eck$LassoCheckResult]: stem already infeasible [2020-06-22 01:08:15,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:15,980 INFO L82 PathProgramCache]: Analyzing trace with hash -2018774301, now seen corresponding path program 2 times [2020-06-22 01:08:15,980 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:15,980 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:15,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:15,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:15,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:16,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:16,013 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:16,013 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:16,013 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:16,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-06-22 01:08:16,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2020-06-22 01:08:16,014 INFO L87 Difference]: Start difference. First operand 569 states and 1073 transitions. cyclomatic complexity: 505 Second operand 4 states. [2020-06-22 01:08:16,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:16,173 INFO L93 Difference]: Finished difference Result 589 states and 1031 transitions. [2020-06-22 01:08:16,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2020-06-22 01:08:16,173 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 589 states and 1031 transitions. [2020-06-22 01:08:16,177 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 568 [2020-06-22 01:08:16,181 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 589 states to 589 states and 1031 transitions. [2020-06-22 01:08:16,181 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 589 [2020-06-22 01:08:16,182 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 589 [2020-06-22 01:08:16,182 INFO L73 IsDeterministic]: Start isDeterministic. Operand 589 states and 1031 transitions. [2020-06-22 01:08:16,183 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:16,183 INFO L706 BuchiCegarLoop]: Abstraction has 589 states and 1031 transitions. [2020-06-22 01:08:16,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 589 states and 1031 transitions. [2020-06-22 01:08:16,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 589 to 569. [2020-06-22 01:08:16,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 569 states. [2020-06-22 01:08:16,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 569 states to 569 states and 999 transitions. [2020-06-22 01:08:16,195 INFO L729 BuchiCegarLoop]: Abstraction has 569 states and 999 transitions. [2020-06-22 01:08:16,195 INFO L609 BuchiCegarLoop]: Abstraction has 569 states and 999 transitions. [2020-06-22 01:08:16,195 INFO L442 BuchiCegarLoop]: ======== Iteration 11============ [2020-06-22 01:08:16,195 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 569 states and 999 transitions. [2020-06-22 01:08:16,198 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 548 [2020-06-22 01:08:16,198 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:16,199 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:16,199 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:16,200 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:16,200 INFO L794 eck$LassoCheckResult]: Stem: 4776#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 4772#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 4725#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 4726#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 4735#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 4810#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 4732#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 4733#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 4737#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 4785#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 4786#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 4697#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 4698#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 4703#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 4811#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 4812#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 4704#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 4705#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 4712#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 4777#L294-1 [940] L294-1-->L299-1: Formula: (< 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 4706#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 4707#L430-1 [2020-06-22 01:08:16,201 INFO L796 eck$LassoCheckResult]: Loop: 4707#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 4743#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 4767#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 4731#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 4738#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 4807#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 5239#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 5238#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 5235#L271-3 [956] L271-3-->L276-3: Formula: (< 0 v_~E_1~0_23) InVars {~E_1~0=v_~E_1~0_23} OutVars{~E_1~0=v_~E_1~0_23} AuxVars[] AssignedVars[] 5230#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 5173#L126-9 [964] L126-9-->L126-11: Formula: (< v_~m_pc~0_14 1) InVars {~m_pc~0=v_~m_pc~0_14} OutVars{~m_pc~0=v_~m_pc~0_14} AuxVars[] AssignedVars[] 5172#L126-11 [726] L126-11-->L137-3: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_21 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_21} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 5171#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 4945#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 4946#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 4940#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 4938#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 4936#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 4934#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 4932#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 4927#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 4924#L294-3 [1015] L294-3-->L299-3: Formula: (< 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 4922#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 4918#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 4919#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 5247#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 5244#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 5243#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 5242#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 5240#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 5236#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 4740#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 4707#L430-1 [2020-06-22 01:08:16,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:16,201 INFO L82 PathProgramCache]: Analyzing trace with hash -2020096972, now seen corresponding path program 1 times [2020-06-22 01:08:16,201 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:16,201 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:16,202 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,202 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:16,202 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:16,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:16,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:16,235 INFO L82 PathProgramCache]: Analyzing trace with hash 479241636, now seen corresponding path program 1 times [2020-06-22 01:08:16,235 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:16,235 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:16,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,236 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:16,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:16,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:16,259 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:16,259 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-06-22 01:08:16,259 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:16,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-06-22 01:08:16,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2020-06-22 01:08:16,260 INFO L87 Difference]: Start difference. First operand 569 states and 999 transitions. cyclomatic complexity: 431 Second operand 4 states. [2020-06-22 01:08:16,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:16,580 INFO L93 Difference]: Finished difference Result 957 states and 1677 transitions. [2020-06-22 01:08:16,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2020-06-22 01:08:16,580 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 957 states and 1677 transitions. [2020-06-22 01:08:16,586 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 936 [2020-06-22 01:08:16,593 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 957 states to 957 states and 1677 transitions. [2020-06-22 01:08:16,593 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 957 [2020-06-22 01:08:16,594 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 957 [2020-06-22 01:08:16,594 INFO L73 IsDeterministic]: Start isDeterministic. Operand 957 states and 1677 transitions. [2020-06-22 01:08:16,596 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:16,596 INFO L706 BuchiCegarLoop]: Abstraction has 957 states and 1677 transitions. [2020-06-22 01:08:16,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 957 states and 1677 transitions. [2020-06-22 01:08:16,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 957 to 585. [2020-06-22 01:08:16,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 585 states. [2020-06-22 01:08:16,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 1023 transitions. [2020-06-22 01:08:16,611 INFO L729 BuchiCegarLoop]: Abstraction has 585 states and 1023 transitions. [2020-06-22 01:08:16,611 INFO L609 BuchiCegarLoop]: Abstraction has 585 states and 1023 transitions. [2020-06-22 01:08:16,611 INFO L442 BuchiCegarLoop]: ======== Iteration 12============ [2020-06-22 01:08:16,611 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 585 states and 1023 transitions. [2020-06-22 01:08:16,614 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 564 [2020-06-22 01:08:16,614 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:16,614 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:16,615 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:16,615 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:16,616 INFO L794 eck$LassoCheckResult]: Stem: 6314#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 6308#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 6259#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 6260#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 6270#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 6348#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 6267#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 6268#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 6272#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 6324#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 6325#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 6233#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 6234#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 6237#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 6349#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 6350#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 6238#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 6239#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 6246#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 6315#L294-1 [940] L294-1-->L299-1: Formula: (< 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 6240#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 6241#L430-1 [2020-06-22 01:08:16,617 INFO L796 eck$LassoCheckResult]: Loop: 6241#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 6363#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 6364#L190 [944] L190-->L194: Formula: (< v_~m_st~0_9 0) InVars {~m_st~0=v_~m_st~0_9} OutVars{~m_st~0=v_~m_st~0_9} AuxVars[] AssignedVars[] 6609#L194 [948] L194-->L202: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_13 0) (< v_~t1_st~0_9 0)) InVars {~t1_st~0=v_~t1_st~0_9} OutVars{~t1_st~0=v_~t1_st~0_9, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_13} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 6606#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 6607#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 6344#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 6335#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 6336#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 6262#L271-3 [956] L271-3-->L276-3: Formula: (< 0 v_~E_1~0_23) InVars {~E_1~0=v_~E_1~0_23} OutVars{~E_1~0=v_~E_1~0_23} AuxVars[] AssignedVars[] 6263#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 6271#L126-9 [964] L126-9-->L126-11: Formula: (< v_~m_pc~0_14 1) InVars {~m_pc~0=v_~m_pc~0_14} OutVars{~m_pc~0=v_~m_pc~0_14} AuxVars[] AssignedVars[] 6312#L126-11 [726] L126-11-->L137-3: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_21 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_21} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 6313#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 6322#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 6355#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 6328#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 6329#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 6765#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 6763#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 6761#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 6757#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 6758#L294-3 [1015] L294-3-->L299-3: Formula: (< 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 6751#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 6752#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 6747#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 6746#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 6741#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 6742#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 6806#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 6804#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 6802#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 6800#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 6241#L430-1 [2020-06-22 01:08:16,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:16,617 INFO L82 PathProgramCache]: Analyzing trace with hash -2020096972, now seen corresponding path program 2 times [2020-06-22 01:08:16,617 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:16,617 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:16,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,618 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:16,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:16,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:16,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:16,632 INFO L82 PathProgramCache]: Analyzing trace with hash -1999847136, now seen corresponding path program 1 times [2020-06-22 01:08:16,632 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:16,632 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:16,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,633 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:16,633 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:16,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:16,657 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:16,657 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-06-22 01:08:16,658 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:16,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:16,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:16,658 INFO L87 Difference]: Start difference. First operand 585 states and 1023 transitions. cyclomatic complexity: 439 Second operand 3 states. [2020-06-22 01:08:16,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:16,901 INFO L93 Difference]: Finished difference Result 1047 states and 1767 transitions. [2020-06-22 01:08:16,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:16,902 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1047 states and 1767 transitions. [2020-06-22 01:08:16,908 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1026 [2020-06-22 01:08:16,915 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1047 states to 1047 states and 1767 transitions. [2020-06-22 01:08:16,915 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1047 [2020-06-22 01:08:16,916 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1047 [2020-06-22 01:08:16,916 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1047 states and 1767 transitions. [2020-06-22 01:08:16,918 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:16,918 INFO L706 BuchiCegarLoop]: Abstraction has 1047 states and 1767 transitions. [2020-06-22 01:08:16,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1047 states and 1767 transitions. [2020-06-22 01:08:16,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1047 to 1047. [2020-06-22 01:08:16,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1047 states. [2020-06-22 01:08:16,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1047 states to 1047 states and 1767 transitions. [2020-06-22 01:08:16,939 INFO L729 BuchiCegarLoop]: Abstraction has 1047 states and 1767 transitions. [2020-06-22 01:08:16,939 INFO L609 BuchiCegarLoop]: Abstraction has 1047 states and 1767 transitions. [2020-06-22 01:08:16,939 INFO L442 BuchiCegarLoop]: ======== Iteration 13============ [2020-06-22 01:08:16,939 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1047 states and 1767 transitions. [2020-06-22 01:08:16,944 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1026 [2020-06-22 01:08:16,944 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:16,944 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:16,945 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:16,945 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:16,946 INFO L794 eck$LassoCheckResult]: Stem: 7953#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 7948#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 7896#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 7897#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 7908#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 7992#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 7904#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 7905#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 7910#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 7965#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 7966#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 7870#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 7871#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 7875#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 7993#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 7994#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 7876#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 7877#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 7884#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 7954#L294-1 [940] L294-1-->L299-1: Formula: (< 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 7878#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 7879#L430-1 [2020-06-22 01:08:16,947 INFO L796 eck$LassoCheckResult]: Loop: 7879#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 8414#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 8466#L190 [945] L190-->L194: Formula: (> v_~m_st~0_9 0) InVars {~m_st~0=v_~m_st~0_9} OutVars{~m_st~0=v_~m_st~0_9} AuxVars[] AssignedVars[] 8464#L194 [948] L194-->L202: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_13 0) (< v_~t1_st~0_9 0)) InVars {~t1_st~0=v_~t1_st~0_9} OutVars{~t1_st~0=v_~t1_st~0_9, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_13} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 8461#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 8462#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 8770#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 8768#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 8766#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 8763#L271-3 [956] L271-3-->L276-3: Formula: (< 0 v_~E_1~0_23) InVars {~E_1~0=v_~E_1~0_23} OutVars{~E_1~0=v_~E_1~0_23} AuxVars[] AssignedVars[] 8744#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 7974#L126-9 [964] L126-9-->L126-11: Formula: (< v_~m_pc~0_14 1) InVars {~m_pc~0=v_~m_pc~0_14} OutVars{~m_pc~0=v_~m_pc~0_14} AuxVars[] AssignedVars[] 7975#L126-11 [726] L126-11-->L137-3: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_21 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_21} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 8740#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 8711#L321-9 [789] L321-9-->L321-11: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_24) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_24} AuxVars[] AssignedVars[] 8707#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 8698#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 8523#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 8687#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 8682#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 8656#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 8654#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 8652#L294-3 [1015] L294-3-->L299-3: Formula: (< 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 8650#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 8648#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 8646#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 8643#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 8637#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 8632#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 8630#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 8628#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 8627#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 8626#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 7879#L430-1 [2020-06-22 01:08:16,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:16,947 INFO L82 PathProgramCache]: Analyzing trace with hash -2020096972, now seen corresponding path program 3 times [2020-06-22 01:08:16,947 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:16,947 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:16,948 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,948 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:16,948 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:16,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:16,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:16,960 INFO L82 PathProgramCache]: Analyzing trace with hash -1649047199, now seen corresponding path program 1 times [2020-06-22 01:08:16,960 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:16,960 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:16,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,961 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:16,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:16,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:16,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:16,983 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:16,983 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-06-22 01:08:16,983 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:16,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:16,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:16,984 INFO L87 Difference]: Start difference. First operand 1047 states and 1767 transitions. cyclomatic complexity: 721 Second operand 3 states. [2020-06-22 01:08:17,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:17,247 INFO L93 Difference]: Finished difference Result 1419 states and 2341 transitions. [2020-06-22 01:08:17,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:17,248 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1419 states and 2341 transitions. [2020-06-22 01:08:17,256 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1398 [2020-06-22 01:08:17,264 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1419 states to 1419 states and 2341 transitions. [2020-06-22 01:08:17,265 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1419 [2020-06-22 01:08:17,266 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1419 [2020-06-22 01:08:17,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1419 states and 2341 transitions. [2020-06-22 01:08:17,268 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:17,269 INFO L706 BuchiCegarLoop]: Abstraction has 1419 states and 2341 transitions. [2020-06-22 01:08:17,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1419 states and 2341 transitions. [2020-06-22 01:08:17,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1419 to 1393. [2020-06-22 01:08:17,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1393 states. [2020-06-22 01:08:17,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1393 states to 1393 states and 2299 transitions. [2020-06-22 01:08:17,296 INFO L729 BuchiCegarLoop]: Abstraction has 1393 states and 2299 transitions. [2020-06-22 01:08:17,296 INFO L609 BuchiCegarLoop]: Abstraction has 1393 states and 2299 transitions. [2020-06-22 01:08:17,296 INFO L442 BuchiCegarLoop]: ======== Iteration 14============ [2020-06-22 01:08:17,296 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1393 states and 2299 transitions. [2020-06-22 01:08:17,302 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1372 [2020-06-22 01:08:17,303 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:17,303 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:17,304 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:17,304 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:17,305 INFO L794 eck$LassoCheckResult]: Stem: 10426#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 10420#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 10369#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 10370#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 10380#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 10456#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 10377#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 10378#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 10382#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 10436#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 10437#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 10343#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 10344#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 10347#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 10457#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 10458#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 10348#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 10349#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 10356#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 10427#L294-1 [940] L294-1-->L299-1: Formula: (< 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 10350#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 10351#L430-1 [2020-06-22 01:08:17,305 INFO L796 eck$LassoCheckResult]: Loop: 10351#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 11237#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 11246#L190 [944] L190-->L194: Formula: (< v_~m_st~0_9 0) InVars {~m_st~0=v_~m_st~0_9} OutVars{~m_st~0=v_~m_st~0_9} AuxVars[] AssignedVars[] 11247#L194 [948] L194-->L202: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_13 0) (< v_~t1_st~0_9 0)) InVars {~t1_st~0=v_~t1_st~0_9} OutVars{~t1_st~0=v_~t1_st~0_9, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_13} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 11467#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 11468#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 11665#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 11663#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 11661#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 11659#L271-3 [956] L271-3-->L276-3: Formula: (< 0 v_~E_1~0_23) InVars {~E_1~0=v_~E_1~0_23} OutVars{~E_1~0=v_~E_1~0_23} AuxVars[] AssignedVars[] 11658#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 11657#L126-9 [964] L126-9-->L126-11: Formula: (< v_~m_pc~0_14 1) InVars {~m_pc~0=v_~m_pc~0_14} OutVars{~m_pc~0=v_~m_pc~0_14} AuxVars[] AssignedVars[] 11450#L126-11 [726] L126-11-->L137-3: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_21 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_21} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 11651#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 11635#L321-9 [982] L321-9-->L321-11: Formula: (and (< 0 v_ULTIMATE.start_activate_threads_~tmp~1_23) (= v_~m_st~0_16 0)) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_23} OutVars{~m_st~0=v_~m_st~0_16, ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_23} AuxVars[] AssignedVars[~m_st~0] 10465#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 11342#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 11101#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 11340#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 11338#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 11336#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 11334#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 11332#L294-3 [1015] L294-3-->L299-3: Formula: (< 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 11330#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 11328#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 11324#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 11320#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 11294#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 11292#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 11289#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 11287#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 11256#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 11252#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 10351#L430-1 [2020-06-22 01:08:17,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:17,306 INFO L82 PathProgramCache]: Analyzing trace with hash -2020096972, now seen corresponding path program 4 times [2020-06-22 01:08:17,306 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:17,306 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:17,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:17,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:17,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:17,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:17,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:17,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:17,318 INFO L82 PathProgramCache]: Analyzing trace with hash -1774160991, now seen corresponding path program 1 times [2020-06-22 01:08:17,319 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:17,319 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:17,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:17,320 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:17,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:17,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:17,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:17,354 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:17,354 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-06-22 01:08:17,354 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:17,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-06-22 01:08:17,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2020-06-22 01:08:17,355 INFO L87 Difference]: Start difference. First operand 1393 states and 2299 transitions. cyclomatic complexity: 907 Second operand 6 states. [2020-06-22 01:08:18,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:18,209 INFO L93 Difference]: Finished difference Result 3116 states and 5219 transitions. [2020-06-22 01:08:18,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2020-06-22 01:08:18,210 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3116 states and 5219 transitions. [2020-06-22 01:08:18,227 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3094 [2020-06-22 01:08:18,247 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3116 states to 3116 states and 5219 transitions. [2020-06-22 01:08:18,248 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3116 [2020-06-22 01:08:18,250 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3116 [2020-06-22 01:08:18,251 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3116 states and 5219 transitions. [2020-06-22 01:08:18,256 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:18,256 INFO L706 BuchiCegarLoop]: Abstraction has 3116 states and 5219 transitions. [2020-06-22 01:08:18,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3116 states and 5219 transitions. [2020-06-22 01:08:18,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3116 to 1405. [2020-06-22 01:08:18,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1405 states. [2020-06-22 01:08:18,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1405 states to 1405 states and 2262 transitions. [2020-06-22 01:08:18,296 INFO L729 BuchiCegarLoop]: Abstraction has 1405 states and 2262 transitions. [2020-06-22 01:08:18,296 INFO L609 BuchiCegarLoop]: Abstraction has 1405 states and 2262 transitions. [2020-06-22 01:08:18,296 INFO L442 BuchiCegarLoop]: ======== Iteration 15============ [2020-06-22 01:08:18,296 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1405 states and 2262 transitions. [2020-06-22 01:08:18,302 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1384 [2020-06-22 01:08:18,302 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:18,302 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:18,304 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:18,304 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:18,304 INFO L794 eck$LassoCheckResult]: Stem: 14979#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 14974#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 14915#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 14916#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 14927#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 15021#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 14923#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 14924#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 14930#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 14991#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 14992#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 14887#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 14888#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 14892#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 15022#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 15023#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 14893#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 14894#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 14901#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 14980#L294-1 [940] L294-1-->L299-1: Formula: (< 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 14895#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 14896#L430-1 [2020-06-22 01:08:18,305 INFO L796 eck$LassoCheckResult]: Loop: 14896#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 15113#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 15108#L190 [944] L190-->L194: Formula: (< v_~m_st~0_9 0) InVars {~m_st~0=v_~m_st~0_9} OutVars{~m_st~0=v_~m_st~0_9} AuxVars[] AssignedVars[] 15109#L194 [948] L194-->L202: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_13 0) (< v_~t1_st~0_9 0)) InVars {~t1_st~0=v_~t1_st~0_9} OutVars{~t1_st~0=v_~t1_st~0_9, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_13} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 15428#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 15422#L217 [1064] L217-->L261-2: Formula: (and (= v_ULTIMATE.start_start_simulation_~kernel_st~0_13 3) (= v_ULTIMATE.start_eval_~tmp~0_9 0)) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} OutVars{ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_13, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_9} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~kernel_st~0] 15415#L261-2 [946] L261-2-->L261-4: Formula: (> v_~M_E~0_13 0) InVars {~M_E~0=v_~M_E~0_13} OutVars{~M_E~0=v_~M_E~0_13} AuxVars[] AssignedVars[] 15410#L261-4 [951] L261-4-->L266-3: Formula: (> v_~T1_E~0_13 0) InVars {~T1_E~0=v_~T1_E~0_13} OutVars{~T1_E~0=v_~T1_E~0_13} AuxVars[] AssignedVars[] 15405#L266-3 [952] L266-3-->L271-3: Formula: (< 0 v_~E_M~0_21) InVars {~E_M~0=v_~E_M~0_21} OutVars{~E_M~0=v_~E_M~0_21} AuxVars[] AssignedVars[] 15397#L271-3 [956] L271-3-->L276-3: Formula: (< 0 v_~E_1~0_23) InVars {~E_1~0=v_~E_1~0_23} OutVars{~E_1~0=v_~E_1~0_23} AuxVars[] AssignedVars[] 15248#L276-3 [656] L276-3-->L126-9: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_19, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_17, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_20, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_10|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_12|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 15249#L126-9 [964] L126-9-->L126-11: Formula: (< v_~m_pc~0_14 1) InVars {~m_pc~0=v_~m_pc~0_14} OutVars{~m_pc~0=v_~m_pc~0_14} AuxVars[] AssignedVars[] 15317#L126-11 [726] L126-11-->L137-3: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_21 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_21} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 15384#L137-3 [1070] L137-3-->L321-9: Formula: (and (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_34 |v_ULTIMATE.start_is_master_triggered_#res_21|) (= |v_ULTIMATE.start_is_master_triggered_#res_21| v_ULTIMATE.start_activate_threads_~tmp~1_34)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_34, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_34, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_21|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_21|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 15385#L321-9 [983] L321-9-->L321-11: Formula: (and (= v_~m_st~0_16 0) (> 0 v_ULTIMATE.start_activate_threads_~tmp~1_23)) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_23} OutVars{~m_st~0=v_~m_st~0_16, ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_23} AuxVars[] AssignedVars[~m_st~0] 15029#L321-11 [796] L321-11-->L145-9: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_25, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_13|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 15211#L145-9 [990] L145-9-->L145-11: Formula: (< v_~t1_pc~0_16 1) InVars {~t1_pc~0=v_~t1_pc~0_16} OutVars{~t1_pc~0=v_~t1_pc~0_16} AuxVars[] AssignedVars[] 15209#L145-11 [745] L145-11-->L156-3: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_29} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 15207#L156-3 [1073] L156-3-->L329-9: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34 |v_ULTIMATE.start_is_transmit1_triggered_#res_19|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_34, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_34, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_21|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_19|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 15205#L329-9 [614] L329-9-->L329-11: Formula: (= v_ULTIMATE.start_activate_threads_~tmp___0~0_25 0) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_25} AuxVars[] AssignedVars[] 15203#L329-11 [1009] L329-11-->L289-3: Formula: (> v_~M_E~0_16 1) InVars {~M_E~0=v_~M_E~0_16} OutVars{~M_E~0=v_~M_E~0_16} AuxVars[] AssignedVars[] 15199#L289-3 [1013] L289-3-->L294-3: Formula: (> v_~T1_E~0_16 1) InVars {~T1_E~0=v_~T1_E~0_16} OutVars{~T1_E~0=v_~T1_E~0_16} AuxVars[] AssignedVars[] 15200#L294-3 [1015] L294-3-->L299-3: Formula: (< 1 v_~E_M~0_26) InVars {~E_M~0=v_~E_M~0_26} OutVars{~E_M~0=v_~E_M~0_26} AuxVars[] AssignedVars[] 15195#L299-3 [1018] L299-3-->L304-3: Formula: (< 1 v_~E_1~0_28) InVars {~E_1~0=v_~E_1~0_28} OutVars{~E_1~0=v_~E_1~0_28} AuxVars[] AssignedVars[] 15196#L304-3 [637] L304-3-->L190-1: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_7|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_15} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 15189#L190-1 [705] L190-1-->L202-1: Formula: (and (= 0 v_~m_st~0_17) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18 1)) InVars {~m_st~0=v_~m_st~0_17} OutVars{~m_st~0=v_~m_st~0_17, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_18} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 15190#L202-1 [1074] L202-1-->L449: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24 |v_ULTIMATE.start_exists_runnable_thread_#res_12|) (= v_ULTIMATE.start_start_simulation_~tmp~3_8 |v_ULTIMATE.start_exists_runnable_thread_#res_12|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_5|, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_24, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_12|, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_8} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_start_simulation_~tmp~3] 15184#L449 [1026] L449-->L449-1: Formula: (< 0 v_ULTIMATE.start_start_simulation_~tmp~3_4) InVars {ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} OutVars{ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_4} AuxVars[] AssignedVars[] 15143#L449-1 [707] L449-1-->L190-2: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_1, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_1|, ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_1, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_1, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_1|, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~__retres2~0, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6, ULTIMATE.start_stop_simulation_#res] 15144#L190-2 [698] L190-2-->L202-2: Formula: (and (= v_~m_st~0_5 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4 1)) InVars {~m_st~0=v_~m_st~0_5} OutVars{~m_st~0=v_~m_st~0_5, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_4} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 15137#L202-2 [1076] L202-2-->L404: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25 |v_ULTIMATE.start_exists_runnable_thread_#res_13|) (= v_ULTIMATE.start_stop_simulation_~tmp~2_7 |v_ULTIMATE.start_exists_runnable_thread_#res_13|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_25, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_13|, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_7, ULTIMATE.start_stop_simulation_#t~ret6=|v_ULTIMATE.start_stop_simulation_#t~ret6_4|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_stop_simulation_~tmp~2, ULTIMATE.start_stop_simulation_#t~ret6] 15138#L404 [761] L404-->L411: Formula: (and (= 0 v_ULTIMATE.start_stop_simulation_~tmp~2_6) (= v_ULTIMATE.start_stop_simulation_~__retres2~0_5 1)) InVars {ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_5, ULTIMATE.start_stop_simulation_~tmp~2=v_ULTIMATE.start_stop_simulation_~tmp~2_6} AuxVars[] AssignedVars[ULTIMATE.start_stop_simulation_~__retres2~0] 15134#L411 [1083] L411-->L430-1: Formula: (and (= v_ULTIMATE.start_stop_simulation_~__retres2~0_8 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 |v_ULTIMATE.start_stop_simulation_#res_5|) (= v_ULTIMATE.start_start_simulation_~tmp___0~1_9 0)) InVars {ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8} OutVars{ULTIMATE.start_stop_simulation_~__retres2~0=v_ULTIMATE.start_stop_simulation_~__retres2~0_8, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_9, ULTIMATE.start_stop_simulation_#res=|v_ULTIMATE.start_stop_simulation_#res_5|, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_6|} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_stop_simulation_#res, ULTIMATE.start_start_simulation_#t~ret8] 14896#L430-1 [2020-06-22 01:08:18,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:18,305 INFO L82 PathProgramCache]: Analyzing trace with hash -2020096972, now seen corresponding path program 5 times [2020-06-22 01:08:18,305 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:18,306 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:18,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:18,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:18,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:18,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:18,318 INFO L82 PathProgramCache]: Analyzing trace with hash 1676334434, now seen corresponding path program 1 times [2020-06-22 01:08:18,318 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:18,318 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:18,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,319 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:18,319 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:18,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:18,351 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:18,351 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-06-22 01:08:18,351 INFO L811 eck$LassoCheckResult]: loop already infeasible [2020-06-22 01:08:18,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-06-22 01:08:18,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2020-06-22 01:08:18,352 INFO L87 Difference]: Start difference. First operand 1405 states and 2262 transitions. cyclomatic complexity: 858 Second operand 6 states. [2020-06-22 01:08:18,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:18,633 INFO L93 Difference]: Finished difference Result 1209 states and 1833 transitions. [2020-06-22 01:08:18,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2020-06-22 01:08:18,633 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1209 states and 1833 transitions. [2020-06-22 01:08:18,640 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1174 [2020-06-22 01:08:18,647 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1209 states to 1209 states and 1833 transitions. [2020-06-22 01:08:18,647 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1209 [2020-06-22 01:08:18,648 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1209 [2020-06-22 01:08:18,648 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1209 states and 1833 transitions. [2020-06-22 01:08:18,649 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:18,650 INFO L706 BuchiCegarLoop]: Abstraction has 1209 states and 1833 transitions. [2020-06-22 01:08:18,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1209 states and 1833 transitions. [2020-06-22 01:08:18,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1209 to 1126. [2020-06-22 01:08:18,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1126 states. [2020-06-22 01:08:18,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1126 states to 1126 states and 1716 transitions. [2020-06-22 01:08:18,673 INFO L729 BuchiCegarLoop]: Abstraction has 1126 states and 1716 transitions. [2020-06-22 01:08:18,673 INFO L609 BuchiCegarLoop]: Abstraction has 1126 states and 1716 transitions. [2020-06-22 01:08:18,673 INFO L442 BuchiCegarLoop]: ======== Iteration 16============ [2020-06-22 01:08:18,673 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1126 states and 1716 transitions. [2020-06-22 01:08:18,677 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1094 [2020-06-22 01:08:18,678 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:18,678 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:18,678 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:18,678 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:18,679 INFO L794 eck$LassoCheckResult]: Stem: 17618#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 17611#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 17556#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 17557#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 17569#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 17657#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 17565#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 17566#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 17572#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 17629#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 17630#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 17529#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 17530#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 17533#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 17658#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 17659#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 17536#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 17537#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 17542#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 17619#L294-1 [940] L294-1-->L299-1: Formula: (< 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 17538#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 17539#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 17726#L236 [2020-06-22 01:08:18,679 INFO L796 eck$LassoCheckResult]: Loop: 17726#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 17722#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 17720#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 17719#L217 [954] L217-->L217-1: Formula: (> v_ULTIMATE.start_eval_~tmp~0_4 0) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_4} OutVars{ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_4} AuxVars[] AssignedVars[] 17717#L217-1 [769] L217-1-->L225: Formula: (and (= v_ULTIMATE.start_eval_~tmp_ndt_1~0_2 |v_ULTIMATE.start_eval_#t~nondet2_3|) (= 0 v_~m_st~0_10)) InVars {~m_st~0=v_~m_st~0_10, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_3|} OutVars{ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_2|, ~m_st~0=v_~m_st~0_10, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_2} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_eval_~tmp_ndt_1~0] 17715#L225 [817] L225-->L222: Formula: (= v_ULTIMATE.start_eval_~tmp_ndt_1~0_5 0) InVars {ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_5} OutVars{ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_5} AuxVars[] AssignedVars[] 17716#L222 [962] L222-->L236: Formula: (> 0 v_~t1_st~0_15) InVars {~t1_st~0=v_~t1_st~0_15} OutVars{~t1_st~0=v_~t1_st~0_15} AuxVars[] AssignedVars[] 17726#L236 [2020-06-22 01:08:18,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:18,679 INFO L82 PathProgramCache]: Analyzing trace with hash 1801504368, now seen corresponding path program 1 times [2020-06-22 01:08:18,680 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:18,680 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:18,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,681 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:18,681 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:18,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:18,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:18,692 INFO L82 PathProgramCache]: Analyzing trace with hash -1704021602, now seen corresponding path program 1 times [2020-06-22 01:08:18,692 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:18,692 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:18,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,693 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:18,693 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:18,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:18,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:18,699 INFO L82 PathProgramCache]: Analyzing trace with hash -697982897, now seen corresponding path program 1 times [2020-06-22 01:08:18,699 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:18,700 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:18,700 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,700 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:18,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:18,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:18,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:18,728 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:18,728 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:18,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:18,780 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:18,780 INFO L87 Difference]: Start difference. First operand 1126 states and 1716 transitions. cyclomatic complexity: 594 Second operand 3 states. [2020-06-22 01:08:18,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:18,986 INFO L93 Difference]: Finished difference Result 1126 states and 1647 transitions. [2020-06-22 01:08:18,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:18,987 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1126 states and 1647 transitions. [2020-06-22 01:08:18,991 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1094 [2020-06-22 01:08:18,998 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1126 states to 1126 states and 1647 transitions. [2020-06-22 01:08:18,998 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1126 [2020-06-22 01:08:18,999 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1126 [2020-06-22 01:08:19,000 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1126 states and 1647 transitions. [2020-06-22 01:08:19,001 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:19,001 INFO L706 BuchiCegarLoop]: Abstraction has 1126 states and 1647 transitions. [2020-06-22 01:08:19,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1126 states and 1647 transitions. [2020-06-22 01:08:19,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1126 to 1126. [2020-06-22 01:08:19,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1126 states. [2020-06-22 01:08:19,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1126 states to 1126 states and 1647 transitions. [2020-06-22 01:08:19,024 INFO L729 BuchiCegarLoop]: Abstraction has 1126 states and 1647 transitions. [2020-06-22 01:08:19,024 INFO L609 BuchiCegarLoop]: Abstraction has 1126 states and 1647 transitions. [2020-06-22 01:08:19,024 INFO L442 BuchiCegarLoop]: ======== Iteration 17============ [2020-06-22 01:08:19,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1126 states and 1647 transitions. [2020-06-22 01:08:19,027 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1094 [2020-06-22 01:08:19,027 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:19,027 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:19,028 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:19,028 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:19,029 INFO L794 eck$LassoCheckResult]: Stem: 19870#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 19863#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 19813#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 19814#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 19824#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 19903#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 19821#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 19822#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 19826#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 19880#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 19881#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 19787#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 19788#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 19792#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 19904#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 19905#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 19793#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 19794#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 19801#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 19871#L294-1 [940] L294-1-->L299-1: Formula: (< 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 19795#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 19796#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 19957#L236 [2020-06-22 01:08:19,029 INFO L796 eck$LassoCheckResult]: Loop: 19957#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 19954#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 19953#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 19952#L217 [954] L217-->L217-1: Formula: (> v_ULTIMATE.start_eval_~tmp~0_4 0) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_4} OutVars{ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_4} AuxVars[] AssignedVars[] 19949#L217-1 [769] L217-1-->L225: Formula: (and (= v_ULTIMATE.start_eval_~tmp_ndt_1~0_2 |v_ULTIMATE.start_eval_#t~nondet2_3|) (= 0 v_~m_st~0_10)) InVars {~m_st~0=v_~m_st~0_10, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_3|} OutVars{ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_2|, ~m_st~0=v_~m_st~0_10, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_2} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_eval_~tmp_ndt_1~0] 19947#L225 [817] L225-->L222: Formula: (= v_ULTIMATE.start_eval_~tmp_ndt_1~0_5 0) InVars {ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_5} OutVars{ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_5} AuxVars[] AssignedVars[] 19948#L222 [963] L222-->L236: Formula: (< 0 v_~t1_st~0_15) InVars {~t1_st~0=v_~t1_st~0_15} OutVars{~t1_st~0=v_~t1_st~0_15} AuxVars[] AssignedVars[] 19957#L236 [2020-06-22 01:08:19,029 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:19,029 INFO L82 PathProgramCache]: Analyzing trace with hash 1801504368, now seen corresponding path program 2 times [2020-06-22 01:08:19,029 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:19,030 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:19,030 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:19,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:19,043 INFO L82 PathProgramCache]: Analyzing trace with hash -1704021601, now seen corresponding path program 1 times [2020-06-22 01:08:19,043 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:19,043 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:19,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,044 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:19,045 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:19,050 INFO L82 PathProgramCache]: Analyzing trace with hash -697982896, now seen corresponding path program 1 times [2020-06-22 01:08:19,051 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:19,051 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:19,051 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,052 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:19,052 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-06-22 01:08:19,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-06-22 01:08:19,071 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-06-22 01:08:19,071 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-06-22 01:08:19,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-06-22 01:08:19,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-06-22 01:08:19,128 INFO L87 Difference]: Start difference. First operand 1126 states and 1647 transitions. cyclomatic complexity: 525 Second operand 3 states. [2020-06-22 01:08:19,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-06-22 01:08:19,362 INFO L93 Difference]: Finished difference Result 1684 states and 2390 transitions. [2020-06-22 01:08:19,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-06-22 01:08:19,363 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1684 states and 2390 transitions. [2020-06-22 01:08:19,369 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1648 [2020-06-22 01:08:19,378 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1684 states to 1684 states and 2390 transitions. [2020-06-22 01:08:19,379 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1684 [2020-06-22 01:08:19,379 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1684 [2020-06-22 01:08:19,380 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1684 states and 2390 transitions. [2020-06-22 01:08:19,381 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2020-06-22 01:08:19,382 INFO L706 BuchiCegarLoop]: Abstraction has 1684 states and 2390 transitions. [2020-06-22 01:08:19,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1684 states and 2390 transitions. [2020-06-22 01:08:19,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1684 to 1660. [2020-06-22 01:08:19,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1660 states. [2020-06-22 01:08:19,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1660 states to 1660 states and 2366 transitions. [2020-06-22 01:08:19,417 INFO L729 BuchiCegarLoop]: Abstraction has 1660 states and 2366 transitions. [2020-06-22 01:08:19,417 INFO L609 BuchiCegarLoop]: Abstraction has 1660 states and 2366 transitions. [2020-06-22 01:08:19,417 INFO L442 BuchiCegarLoop]: ======== Iteration 18============ [2020-06-22 01:08:19,417 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1660 states and 2366 transitions. [2020-06-22 01:08:19,422 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1624 [2020-06-22 01:08:19,422 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2020-06-22 01:08:19,422 INFO L119 BuchiIsEmpty]: Starting construction of run [2020-06-22 01:08:19,422 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:19,422 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2020-06-22 01:08:19,423 INFO L794 eck$LassoCheckResult]: Stem: 22691#ULTIMATE.startENTRY [1057] ULTIMATE.startENTRY-->L165: Formula: (and (= 0 v_~m_st~0_20) (= 2 v_~E_M~0_30) (= v_~t1_pc~0_18 0) (= 0 v_~t1_st~0_20) (= v_ULTIMATE.start_start_simulation_~kernel_st~0_10 0) (= v_~T1_E~0_18 2) (= 0 v_~token~0_8) (= v_~M_E~0_19 2) (= v_~local~0_6 0) (= v_~m_i~0_7 1) (= 2 v_~E_1~0_30) (= v_~m_pc~0_18 0) (= 1 v_~t1_i~0_7)) InVars {} OutVars{ULTIMATE.start_start_simulation_#t~ret7=|v_ULTIMATE.start_start_simulation_#t~ret7_4|, ~t1_st~0=v_~t1_st~0_20, ~t1_pc~0=v_~t1_pc~0_18, ~M_E~0=v_~M_E~0_19, ~m_i~0=v_~m_i~0_7, ULTIMATE.start_start_simulation_~tmp___0~1=v_ULTIMATE.start_start_simulation_~tmp___0~1_7, ULTIMATE.start_start_simulation_~tmp~3=v_ULTIMATE.start_start_simulation_~tmp~3_7, ULTIMATE.start_start_simulation_#t~ret8=|v_ULTIMATE.start_start_simulation_#t~ret8_4|, ~token~0=v_~token~0_8, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_10, ~E_1~0=v_~E_1~0_30, ~E_M~0=v_~E_M~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_5|, ~T1_E~0=v_~T1_E~0_18, ~local~0=v_~local~0_6, ~t1_i~0=v_~t1_i~0_7, ~m_st~0=v_~m_st~0_20, ~m_pc~0=v_~m_pc~0_18, ULTIMATE.start_main_~__retres1~3=v_ULTIMATE.start_main_~__retres1~3_6} AuxVars[] AssignedVars[ULTIMATE.start_start_simulation_#t~ret7, ~t1_st~0, ~t1_pc~0, ~M_E~0, ~m_i~0, ULTIMATE.start_start_simulation_~tmp___0~1, ULTIMATE.start_start_simulation_~tmp~3, ULTIMATE.start_start_simulation_#t~ret8, ~token~0, ULTIMATE.start_start_simulation_~kernel_st~0, ~E_1~0, ~E_M~0, ULTIMATE.start_main_#res, ~T1_E~0, ~local~0, ~t1_i~0, ~m_st~0, ~m_pc~0, ULTIMATE.start_main_~__retres1~3] 22686#L165 [720] L165-->L172-1: Formula: (and (= v_~m_i~0_3 1) (= v_~m_st~0_3 0)) InVars {~m_i~0=v_~m_i~0_3} OutVars{~m_st~0=v_~m_st~0_3, ~m_i~0=v_~m_i~0_3} AuxVars[] AssignedVars[~m_st~0] 22633#L172-1 [642] L172-1-->L177-1: Formula: (and (= v_~t1_st~0_2 0) (= 1 v_~t1_i~0_3)) InVars {~t1_i~0=v_~t1_i~0_3} OutVars{~t1_st~0=v_~t1_st~0_2, ~t1_i~0=v_~t1_i~0_3} AuxVars[] AssignedVars[~t1_st~0] 22634#L177-1 [917] L177-1-->L261-1: Formula: (< 0 v_~M_E~0_4) InVars {~M_E~0=v_~M_E~0_4} OutVars{~M_E~0=v_~M_E~0_4} AuxVars[] AssignedVars[] 22644#L261-1 [919] L261-1-->L266-1: Formula: (< 0 v_~T1_E~0_4) InVars {~T1_E~0=v_~T1_E~0_4} OutVars{~T1_E~0=v_~T1_E~0_4} AuxVars[] AssignedVars[] 22729#L266-1 [921] L266-1-->L271-1: Formula: (> v_~E_M~0_4 0) InVars {~E_M~0=v_~E_M~0_4} OutVars{~E_M~0=v_~E_M~0_4} AuxVars[] AssignedVars[] 22640#L271-1 [922] L271-1-->L276-1: Formula: (> v_~E_1~0_6 0) InVars {~E_1~0=v_~E_1~0_6} OutVars{~E_1~0=v_~E_1~0_6} AuxVars[] AssignedVars[] 22641#L276-1 [657] L276-1-->L126: Formula: true InVars {} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_3, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_1, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_4, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_1|, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_3|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_is_master_triggered_~__retres1~0, ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_master_triggered_#res] 22647#L126 [924] L126-->L126-2: Formula: (< v_~m_pc~0_3 1) InVars {~m_pc~0=v_~m_pc~0_3} OutVars{~m_pc~0=v_~m_pc~0_3} AuxVars[] AssignedVars[] 22703#L126-2 [746] L126-2-->L137: Formula: (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_5 0) InVars {} OutVars{ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_5} AuxVars[] AssignedVars[ULTIMATE.start_is_master_triggered_~__retres1~0] 22704#L137 [1058] L137-->L321: Formula: (and (= |v_ULTIMATE.start_is_master_triggered_#res_16| v_ULTIMATE.start_activate_threads_~tmp~1_29) (= v_ULTIMATE.start_is_master_triggered_~__retres1~0_29 |v_ULTIMATE.start_is_master_triggered_#res_16|)) InVars {ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_29, ULTIMATE.start_is_master_triggered_~__retres1~0=v_ULTIMATE.start_is_master_triggered_~__retres1~0_29, ULTIMATE.start_activate_threads_#t~ret4=|v_ULTIMATE.start_activate_threads_#t~ret4_16|, ULTIMATE.start_is_master_triggered_#res=|v_ULTIMATE.start_is_master_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp~1, ULTIMATE.start_activate_threads_#t~ret4, ULTIMATE.start_is_master_triggered_#res] 22605#L321 [611] L321-->L321-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp~1_8) InVars {ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} OutVars{ULTIMATE.start_activate_threads_~tmp~1=v_ULTIMATE.start_activate_threads_~tmp~1_8} AuxVars[] AssignedVars[] 22606#L321-2 [615] L321-2-->L145: Formula: true InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_7, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_4|} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1, ULTIMATE.start_is_transmit1_triggered_#res] 22611#L145 [930] L145-->L145-2: Formula: (< v_~t1_pc~0_5 1) InVars {~t1_pc~0=v_~t1_pc~0_5} OutVars{~t1_pc~0=v_~t1_pc~0_5} AuxVars[] AssignedVars[] 22730#L145-2 [783] L145-2-->L156: Formula: (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11 0) InVars {} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_11} AuxVars[] AssignedVars[ULTIMATE.start_is_transmit1_triggered_~__retres1~1] 22731#L156 [1059] L156-->L329: Formula: (and (= v_ULTIMATE.start_activate_threads_~tmp___0~0_29 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|) (= v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31 |v_ULTIMATE.start_is_transmit1_triggered_#res_16|)) InVars {ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31} OutVars{ULTIMATE.start_is_transmit1_triggered_~__retres1~1=v_ULTIMATE.start_is_transmit1_triggered_~__retres1~1_31, ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_29, ULTIMATE.start_activate_threads_#t~ret5=|v_ULTIMATE.start_activate_threads_#t~ret5_16|, ULTIMATE.start_is_transmit1_triggered_#res=|v_ULTIMATE.start_is_transmit1_triggered_#res_16|} AuxVars[] AssignedVars[ULTIMATE.start_activate_threads_~tmp___0~0, ULTIMATE.start_activate_threads_#t~ret5, ULTIMATE.start_is_transmit1_triggered_#res] 22612#L329 [618] L329-->L329-2: Formula: (= 0 v_ULTIMATE.start_activate_threads_~tmp___0~0_9) InVars {ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} OutVars{ULTIMATE.start_activate_threads_~tmp___0~0=v_ULTIMATE.start_activate_threads_~tmp___0~0_9} AuxVars[] AssignedVars[] 22613#L329-2 [937] L329-2-->L289-1: Formula: (> v_~M_E~0_10 1) InVars {~M_E~0=v_~M_E~0_10} OutVars{~M_E~0=v_~M_E~0_10} AuxVars[] AssignedVars[] 22620#L289-1 [939] L289-1-->L294-1: Formula: (> v_~T1_E~0_10 1) InVars {~T1_E~0=v_~T1_E~0_10} OutVars{~T1_E~0=v_~T1_E~0_10} AuxVars[] AssignedVars[] 22692#L294-1 [940] L294-1-->L299-1: Formula: (< 1 v_~E_M~0_12) InVars {~E_M~0=v_~E_M~0_12} OutVars{~E_M~0=v_~E_M~0_12} AuxVars[] AssignedVars[] 22614#L299-1 [942] L299-1-->L430-1: Formula: (< 1 v_~E_1~0_14) InVars {~E_1~0=v_~E_1~0_14} OutVars{~E_1~0=v_~E_1~0_14} AuxVars[] AssignedVars[] 22615#L430-1 [1060] L430-1-->L236: Formula: (= v_ULTIMATE.start_start_simulation_~kernel_st~0_11 1) InVars {} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_4|, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_4|, ULTIMATE.start_start_simulation_~kernel_st~0=v_ULTIMATE.start_start_simulation_~kernel_st~0_11, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_6, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_6, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_6, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_4|} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_start_simulation_~kernel_st~0, ULTIMATE.start_eval_~tmp_ndt_1~0, ULTIMATE.start_eval_~tmp_ndt_2~0, ULTIMATE.start_eval_~tmp~0, ULTIMATE.start_eval_#t~ret1] 22796#L236 [2020-06-22 01:08:19,423 INFO L796 eck$LassoCheckResult]: Loop: 22796#L236 [1061] L236-->L190: Formula: true InVars {} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_22, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_10|} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2, ULTIMATE.start_exists_runnable_thread_#res] 22793#L190 [708] L190-->L202: Formula: (and (= v_~m_st~0_8 0) (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11 1)) InVars {~m_st~0=v_~m_st~0_8} OutVars{~m_st~0=v_~m_st~0_8, ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_11} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_~__retres1~2] 22792#L202 [1062] L202-->L217: Formula: (and (= v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23 |v_ULTIMATE.start_exists_runnable_thread_#res_11|) (= v_ULTIMATE.start_eval_~tmp~0_7 |v_ULTIMATE.start_exists_runnable_thread_#res_11|)) InVars {ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23} OutVars{ULTIMATE.start_exists_runnable_thread_~__retres1~2=v_ULTIMATE.start_exists_runnable_thread_~__retres1~2_23, ULTIMATE.start_exists_runnable_thread_#res=|v_ULTIMATE.start_exists_runnable_thread_#res_11|, ULTIMATE.start_eval_#t~ret1=|v_ULTIMATE.start_eval_#t~ret1_5|, ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_7} AuxVars[] AssignedVars[ULTIMATE.start_exists_runnable_thread_#res, ULTIMATE.start_eval_#t~ret1, ULTIMATE.start_eval_~tmp~0] 22791#L217 [954] L217-->L217-1: Formula: (> v_ULTIMATE.start_eval_~tmp~0_4 0) InVars {ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_4} OutVars{ULTIMATE.start_eval_~tmp~0=v_ULTIMATE.start_eval_~tmp~0_4} AuxVars[] AssignedVars[] 22788#L217-1 [769] L217-1-->L225: Formula: (and (= v_ULTIMATE.start_eval_~tmp_ndt_1~0_2 |v_ULTIMATE.start_eval_#t~nondet2_3|) (= 0 v_~m_st~0_10)) InVars {~m_st~0=v_~m_st~0_10, ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_3|} OutVars{ULTIMATE.start_eval_#t~nondet2=|v_ULTIMATE.start_eval_#t~nondet2_2|, ~m_st~0=v_~m_st~0_10, ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_2} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet2, ULTIMATE.start_eval_~tmp_ndt_1~0] 22786#L225 [817] L225-->L222: Formula: (= v_ULTIMATE.start_eval_~tmp_ndt_1~0_5 0) InVars {ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_5} OutVars{ULTIMATE.start_eval_~tmp_ndt_1~0=v_ULTIMATE.start_eval_~tmp_ndt_1~0_5} AuxVars[] AssignedVars[] 22787#L222 [799] L222-->L239: Formula: (and (= v_ULTIMATE.start_eval_~tmp_ndt_2~0_2 |v_ULTIMATE.start_eval_#t~nondet3_3|) (= 0 v_~t1_st~0_11)) InVars {ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_3|, ~t1_st~0=v_~t1_st~0_11} OutVars{ULTIMATE.start_eval_#t~nondet3=|v_ULTIMATE.start_eval_#t~nondet3_2|, ~t1_st~0=v_~t1_st~0_11, ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_2} AuxVars[] AssignedVars[ULTIMATE.start_eval_#t~nondet3, ULTIMATE.start_eval_~tmp_ndt_2~0] 22797#L239 [732] L239-->L236: Formula: (= v_ULTIMATE.start_eval_~tmp_ndt_2~0_5 0) InVars {ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_5} OutVars{ULTIMATE.start_eval_~tmp_ndt_2~0=v_ULTIMATE.start_eval_~tmp_ndt_2~0_5} AuxVars[] AssignedVars[] 22796#L236 [2020-06-22 01:08:19,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:19,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1801504368, now seen corresponding path program 3 times [2020-06-22 01:08:19,424 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:19,424 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:19,425 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,425 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:19,425 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:19,436 INFO L82 PathProgramCache]: Analyzing trace with hash -1285066431, now seen corresponding path program 1 times [2020-06-22 01:08:19,436 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:19,436 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:19,437 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,437 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2020-06-22 01:08:19,437 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-06-22 01:08:19,442 INFO L82 PathProgramCache]: Analyzing trace with hash -162637648, now seen corresponding path program 1 times [2020-06-22 01:08:19,442 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2020-06-22 01:08:19,442 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2020-06-22 01:08:19,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,443 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-06-22 01:08:19,443 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2020-06-22 01:08:19,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-06-22 01:08:19,685 WARN L188 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 48 [2020-06-22 01:08:19,767 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 22.06 01:08:19 BasicIcfg [2020-06-22 01:08:19,768 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2020-06-22 01:08:19,768 INFO L168 Benchmark]: Toolchain (without parser) took 8028.48 ms. Allocated memory was 649.6 MB in the beginning and 841.5 MB in the end (delta: 191.9 MB). Free memory was 564.3 MB in the beginning and 412.6 MB in the end (delta: 151.7 MB). Peak memory consumption was 343.6 MB. Max. memory is 50.3 GB. [2020-06-22 01:08:19,769 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 649.6 MB. Free memory is still 585.8 MB. There was no memory consumed. Max. memory is 50.3 GB. [2020-06-22 01:08:19,770 INFO L168 Benchmark]: CACSL2BoogieTranslator took 377.38 ms. Allocated memory was 649.6 MB in the beginning and 696.3 MB in the end (delta: 46.7 MB). Free memory was 564.3 MB in the beginning and 655.7 MB in the end (delta: -91.4 MB). Peak memory consumption was 30.0 MB. Max. memory is 50.3 GB. [2020-06-22 01:08:19,771 INFO L168 Benchmark]: Boogie Procedure Inliner took 50.43 ms. Allocated memory is still 696.3 MB. Free memory was 655.7 MB in the beginning and 651.7 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 50.3 GB. [2020-06-22 01:08:19,772 INFO L168 Benchmark]: Boogie Preprocessor took 35.23 ms. Allocated memory is still 696.3 MB. Free memory was 651.7 MB in the beginning and 649.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 50.3 GB. [2020-06-22 01:08:19,772 INFO L168 Benchmark]: RCFGBuilder took 596.61 ms. Allocated memory is still 696.3 MB. Free memory was 649.0 MB in the beginning and 603.7 MB in the end (delta: 45.3 MB). Peak memory consumption was 45.3 MB. Max. memory is 50.3 GB. [2020-06-22 01:08:19,773 INFO L168 Benchmark]: BlockEncodingV2 took 193.83 ms. Allocated memory is still 696.3 MB. Free memory was 603.7 MB in the beginning and 582.1 MB in the end (delta: 21.6 MB). Peak memory consumption was 21.6 MB. Max. memory is 50.3 GB. [2020-06-22 01:08:19,773 INFO L168 Benchmark]: TraceAbstraction took 243.35 ms. Allocated memory is still 696.3 MB. Free memory was 582.1 MB in the beginning and 559.2 MB in the end (delta: 22.9 MB). Peak memory consumption was 22.9 MB. Max. memory is 50.3 GB. [2020-06-22 01:08:19,774 INFO L168 Benchmark]: BuchiAutomizer took 6526.04 ms. Allocated memory was 696.3 MB in the beginning and 841.5 MB in the end (delta: 145.2 MB). Free memory was 557.8 MB in the beginning and 412.6 MB in the end (delta: 145.2 MB). Peak memory consumption was 290.5 MB. Max. memory is 50.3 GB. [2020-06-22 01:08:19,778 INFO L337 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.blockencoding: - StatisticsResult: Initial Icfg 146 locations, 229 edges - StatisticsResult: Encoded RCFG 114 locations, 257 edges * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 649.6 MB. Free memory is still 585.8 MB. There was no memory consumed. Max. memory is 50.3 GB. * CACSL2BoogieTranslator took 377.38 ms. Allocated memory was 649.6 MB in the beginning and 696.3 MB in the end (delta: 46.7 MB). Free memory was 564.3 MB in the beginning and 655.7 MB in the end (delta: -91.4 MB). Peak memory consumption was 30.0 MB. Max. memory is 50.3 GB. * Boogie Procedure Inliner took 50.43 ms. Allocated memory is still 696.3 MB. Free memory was 655.7 MB in the beginning and 651.7 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 50.3 GB. * Boogie Preprocessor took 35.23 ms. Allocated memory is still 696.3 MB. Free memory was 651.7 MB in the beginning and 649.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 50.3 GB. * RCFGBuilder took 596.61 ms. Allocated memory is still 696.3 MB. Free memory was 649.0 MB in the beginning and 603.7 MB in the end (delta: 45.3 MB). Peak memory consumption was 45.3 MB. Max. memory is 50.3 GB. * BlockEncodingV2 took 193.83 ms. Allocated memory is still 696.3 MB. Free memory was 603.7 MB in the beginning and 582.1 MB in the end (delta: 21.6 MB). Peak memory consumption was 21.6 MB. Max. memory is 50.3 GB. * TraceAbstraction took 243.35 ms. Allocated memory is still 696.3 MB. Free memory was 582.1 MB in the beginning and 559.2 MB in the end (delta: 22.9 MB). Peak memory consumption was 22.9 MB. Max. memory is 50.3 GB. * BuchiAutomizer took 6526.04 ms. Allocated memory was 696.3 MB in the beginning and 841.5 MB in the end (delta: 145.2 MB). Free memory was 557.8 MB in the beginning and 412.6 MB in the end (delta: 145.2 MB). Peak memory consumption was 290.5 MB. Max. memory is 50.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - AllSpecificationsHoldResult: All specifications hold We were not able to verify any specifiation because the program does not contain any specification. - InvariantResult [Line: 1]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 125]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 261]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 125]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 257]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 125]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 1]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 449]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 93]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 125]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 257]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 449]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 125]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 189]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 289]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 400]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 217]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 144]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 172]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 37]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 144]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 33]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 285]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 285]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 144]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 189]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 212]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 189]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 289]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: -1]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 212]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 144]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 362]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 144]: Loop Invariant Derived loop invariant: 1 - InvariantResult [Line: 89]: Loop Invariant Derived loop invariant: 1 - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 114 locations, 0 error locations. SAFE Result, 0.1s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.1s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=114occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 35 LocationsWithAnnotation, 35 PreInvPairs, 35 NumberOfFragments, 35 HoareAnnotationTreeSize, 35 FomulaSimplifications, 0 FormulaSimplificationTreeSizeReduction, 0.0s HoareSimplificationTime, 35 FomulaSimplificationsInter, 0 FormulaSimplificationTreeSizeReductionInter, 0.0s HoareSimplificationTimeInter, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - StatisticsResult: Constructed decomposition of program Your program was decomposed into 17 terminating modules (17 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.17 modules have a trivial ranking function, the largest among these consists of 6 locations. The remainder module has 1660 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 6.4s and 18 iterations. TraceHistogramMax:1. Analysis of lassos took 1.4s. Construction of modules took 2.9s. Büchi inclusion checks took 1.3s. Highest rank in rank-based complementation 0. Minimization of det autom 17. Minimization of nondet autom 0. Automata minimization 0.2s AutomataMinimizationTime, 17 MinimizatonAttempts, 2284 StatesRemovedByMinimization, 9 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had 1660 states and ocurred in iteration 17. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 1804 SDtfs, 4285 SDslu, 2201 SDs, 0 SdLazy, 3845 SolverSat, 213 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.9s Time LassoAnalysisResults: nont1 unkn0 SFLI5 SFLT0 conc2 concLT0 SILN0 SILU0 SILI10 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 212]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=0, token=0, __retres1=0, tmp=1, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6c27e1f8=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@36d8aff9=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@129d9c6a=0, kernel_st=1, __retres1=0, tmp___0=0, t1_pc=0, __retres1=1, T1_E=2, \result=0, E_1=2, tmp_ndt_1=0, M_E=2, tmp_ndt_2=0, tmp=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@3e1e9d2b=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@206af369=0, m_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@77861ef5=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@224f2413=0, t1_st=0, local=0, m_st=0, E_M=2, tmp___0=0, tmp=0, __retres1=0, t1_i=1, m_pc=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 212]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int m_st ; [L17] int t1_st ; [L18] int m_i ; [L19] int t1_i ; [L20] int M_E = 2; [L21] int T1_E = 2; [L22] int E_M = 2; [L23] int E_1 = 2; [L27] int token ; [L29] int local ; [L475] int __retres1 ; [L390] m_i = 1 [L391] t1_i = 1 [L416] int kernel_st ; [L417] int tmp ; [L418] int tmp___0 ; [L422] kernel_st = 0 [L172] COND TRUE m_i == 1 [L173] m_st = 0 [L177] COND TRUE t1_i == 1 [L178] t1_st = 0 [L261] COND FALSE !(M_E == 0) [L266] COND FALSE !(T1_E == 0) [L271] COND FALSE !(E_M == 0) [L276] COND FALSE !(E_1 == 0) [L314] int tmp ; [L315] int tmp___0 ; [L123] int __retres1 ; [L126] COND FALSE !(m_pc == 1) [L136] __retres1 = 0 [L138] return (__retres1); [L319] tmp = is_master_triggered() [L321] COND FALSE !(\read(tmp)) [L142] int __retres1 ; [L145] COND FALSE !(t1_pc == 1) [L155] __retres1 = 0 [L157] return (__retres1); [L327] tmp___0 = is_transmit1_triggered() [L329] COND FALSE !(\read(tmp___0)) [L289] COND FALSE !(M_E == 1) [L294] COND FALSE !(T1_E == 1) [L299] COND FALSE !(E_M == 1) [L304] COND FALSE !(E_1 == 1) [L430] COND TRUE 1 [L433] kernel_st = 1 [L208] int tmp ; Loop: [L212] COND TRUE 1 [L187] int __retres1 ; [L190] COND TRUE m_st == 0 [L191] __retres1 = 1 [L203] return (__retres1); [L215] tmp = exists_runnable_thread() [L217] COND TRUE \read(tmp) [L222] COND TRUE m_st == 0 [L223] int tmp_ndt_1; [L224] tmp_ndt_1 = __VERIFIER_nondet_int() [L225] COND FALSE !(\read(tmp_ndt_1)) [L236] COND TRUE t1_st == 0 [L237] int tmp_ndt_2; [L238] tmp_ndt_2 = __VERIFIER_nondet_int() [L239] COND FALSE !(\read(tmp_ndt_2)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! !SESSION 2020-06-22 01:08:08.566 ----------------------------------------------- eclipse.buildId=unknown java.version=1.8.0_242 java.vendor=Oracle Corporation BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US Framework arguments: -tc ./../AutomizerAndBuchiAutomizerCInlineWithBlockEncoding.xml -s ./../termcomp2017.epf -i /export/starexec/sandbox2/benchmark/theBenchmark.c Command-line arguments: -os linux -ws gtk -arch x86_64 -consoleLog -data @user.home/.ultimate -tc ./../AutomizerAndBuchiAutomizerCInlineWithBlockEncoding.xml -s ./../termcomp2017.epf -data /export/starexec/sandbox2/tmp -i /export/starexec/sandbox2/benchmark/theBenchmark.c !ENTRY org.eclipse.core.resources 2 10035 2020-06-22 01:08:20.028 !MESSAGE The workspace will exit with unsaved changes in this session. Received shutdown request... Ultimate: GTK+ Version Check