YES proof of /export/starexec/sandbox2/benchmark/theBenchmark.c # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination of the given C Problem could be proven: (0) C Problem (1) CToLLVMProof [EQUIVALENT, 175 ms] (2) LLVM problem (3) LLVMToTerminationGraphProof [EQUIVALENT, 1586 ms] (4) LLVM Symbolic Execution Graph (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] (6) AND (7) LLVM Symbolic Execution SCC (8) SCC2IRS [SOUND, 69 ms] (9) IntTRS (10) IntTRSCompressionProof [EQUIVALENT, 0 ms] (11) IntTRS (12) PolynomialOrderProcessor [EQUIVALENT, 19 ms] (13) AND (14) IntTRS (15) TerminationGraphProcessor [EQUIVALENT, 4 ms] (16) YES (17) IntTRS (18) IntTRSCompressionProof [EQUIVALENT, 0 ms] (19) IntTRS (20) IntTRSUnneededArgumentFilterProof [EQUIVALENT, 0 ms] (21) IntTRS (22) RankingReductionPairProof [EQUIVALENT, 5 ms] (23) YES (24) LLVM Symbolic Execution SCC (25) SCC2IRS [SOUND, 37 ms] (26) IntTRS (27) IntTRSCompressionProof [EQUIVALENT, 0 ms] (28) IntTRS (29) PolynomialOrderProcessor [EQUIVALENT, 11 ms] (30) YES ---------------------------------------- (0) Obligation: c file /export/starexec/sandbox2/benchmark/theBenchmark.c ---------------------------------------- (1) CToLLVMProof (EQUIVALENT) Compiled c-file /export/starexec/sandbox2/benchmark/theBenchmark.c to LLVM. ---------------------------------------- (2) Obligation: LLVM Problem Aliases: Data layout: "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" Machine: "x86_64-pc-linux-gnu" Type definitions: Global variables: Function declarations and definitions: *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %j = alloca i32, align 4 %N = alloca i32, align 4 %i = alloca i32, align 4 store 0, %1 %2 = call i32 @__VERIFIER_nondet_int() store %2, %j %3 = call i32 @__VERIFIER_nondet_int() store %3, %N %4 = load %N store %4, %i br %5 5: %6 = load %i %7 = icmp sgt %6 0 br %7, %8, %19 8: %9 = load %j %10 = icmp sgt %9 0 br %10, %11, %14 11: %12 = load %j %13 = add %12 -1 store %13, %j br %18 14: %15 = load %N store %15, %j %16 = load %i %17 = add %16 -1 store %17, %i br %18 18: br %5 19: ret 0 Analyze Termination of all function calls matching the pattern: main() ---------------------------------------- (3) LLVMToTerminationGraphProof (EQUIVALENT) Constructed symbolic execution graph for LLVM program and proved memory safety. ---------------------------------------- (4) Obligation: SE Graph ---------------------------------------- (5) SymbolicExecutionGraphToSCCProof (SOUND) Splitted symbolic execution graph to 2 SCCs. ---------------------------------------- (6) Complex Obligation (AND) ---------------------------------------- (7) Obligation: SCC ---------------------------------------- (8) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 33 rulesP rules: f_305(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) -> f_306(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) :|: 0 = 0 f_306(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) -> f_307(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) :|: 0 = 0 f_307(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) -> f_308(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) :|: TRUE f_308(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) -> f_309(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) :|: 0 = 0 f_309(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) -> f_310(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) :|: 0 < v803 && 2 <= v801 f_309(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) -> f_311(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) :|: v803 <= 0 && v801 = 1 && v803 = 0 && 0 = 0 f_310(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) -> f_312(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) :|: 0 = 0 f_312(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) -> f_314(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) :|: TRUE f_314(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v804, v805, v806, v807, 0, 3, 2, 4) -> f_315(v793, v794, v795, v796, v797, v798, v799, 1, v803, v802, v801, v803, v804, v805, v806, v807, 0, 3, 2, 4) :|: TRUE f_315(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v904, v905, v906, v907, v908, v909, 0, 3, 2, 4) -> f_317(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v905, v906, v907, v908, v909, 0, 3, 2, 4) :|: 0 = 0 f_317(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v905, v906, v907, v908, v909, 0, 3, 2, 4) -> f_319(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v915, v906, v907, v908, v909, 0, 3, 2, 4) :|: 1 + v915 = v902 && 0 <= v915 f_319(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v915, v906, v907, v908, v909, 0, 3, 2, 4) -> f_321(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v915, v906, v907, v908, v909, 0, 3, 2, 4) :|: TRUE f_321(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v915, v906, v907, v908, v909, 0, 3, 2, 4) -> f_323(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v915, v906, v907, v908, v909, 0, 3, 2, 4) :|: TRUE f_323(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v915, v906, v907, v908, v909, 0, 3, 2, 4) -> f_304(v894, v895, v896, v897, v898, v899, v900, 1, v902, v903, v915, v906, v907, v908, v909, 0, 3, 2, 4) :|: TRUE f_304(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) -> f_305(v793, v794, v795, v796, v797, v798, v799, 1, v801, v802, v803, v804, v805, v806, v807, 0, 3, 2, 4) :|: TRUE f_311(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) -> f_313(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) :|: 0 = 0 f_313(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) -> f_316(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) :|: TRUE f_316(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) -> f_318(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) :|: 0 = 0 f_318(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) -> f_320(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) :|: TRUE f_320(v793, v794, v795, v796, v797, v798, v799, 1, 0, v802, v804, v805, v806, v807, 3, 2, 4) -> f_322(v793, v794, v795, v796, v797, v798, v799, 1, 0, v804, v805, v806, v807, 3, 2, 4) :|: 0 = 0 f_322(v793, v794, v795, v796, v797, v798, v799, 1, 0, v804, v805, v806, v807, 3, 2, 4) -> f_324(v793, v794, v795, v796, v797, v798, v799, 1, 0, v962, v804, v805, v806, v807, 3, 2, 4) :|: 1 + v962 = v799 && 0 <= v962 f_324(v793, v794, v795, v796, v797, v798, v799, 1, 0, v962, v804, v805, v806, v807, 3, 2, 4) -> f_325(v793, v794, v795, v796, v797, v798, v799, 1, 0, v962, v804, v805, v806, v807, 3, 2, 4) :|: TRUE f_325(v793, v794, v795, v796, v797, v798, v799, 1, 0, v962, v804, v805, v806, v807, 3, 2, 4) -> f_326(v793, v794, v795, v796, v797, v798, v799, 1, 0, v962, v804, v805, v806, v807, 3, 2, 4) :|: TRUE f_326(v793, v794, v795, v796, v797, v798, v799, 1, 0, v962, v804, v805, v806, v807, 3, 2, 4) -> f_327(v793, v794, v795, v796, v797, v798, v799, 1, 0, v962, v804, v805, v806, v807, 3, 4) :|: TRUE f_327(v984, v985, v986, v987, v988, v989, v990, 1, 0, v993, v994, v995, v996, v997, 3, 4) -> f_328(v984, v985, v986, v987, v988, v989, v990, 1, 0, v993, v994, v995, v996, v997, 3, 4) :|: TRUE f_328(v984, v985, v986, v987, v988, v989, v990, 1, 0, v993, v994, v995, v996, v997, 3, 4) -> f_329(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 4) :|: 0 = 0 f_329(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 4) -> f_330(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) :|: 0 < v993 && 2 <= v990 && 2 <= v989 f_330(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) -> f_332(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) :|: 0 = 0 f_332(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) -> f_334(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) :|: TRUE f_334(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) -> f_336(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) :|: 0 = 0 f_336(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) -> f_337(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) :|: 0 = 0 f_337(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) -> f_338(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) :|: TRUE f_338(v984, v985, v986, v987, v988, v989, v993, 1, 0, v990, v994, v995, v996, v997, 3, 2, 4) -> f_315(v984, v985, v986, v987, v988, v989, v993, 1, v989, v990, 1, 0, v994, v995, v996, v997, 0, 3, 2, 4) :|: TRUE Combined rules. Obtained 2 rulesP rules: f_305(v793:0, v794:0, v795:0, v796:0, v797:0, 1 + v915:0, 1 + v962:0, 1, 1, v802:0, 0, v804:0, v805:0, v806:0, v807:0, 0, 3, 2, 4) -> f_305(v793:0, v794:0, v795:0, v796:0, v797:0, 1 + v915:0, v962:0, 1, 1 + v915:0, 1 + v962:0, v915:0, v804:0, v805:0, v806:0, v807:0, 0, 3, 2, 4) :|: v915:0 > 0 && v962:0 > 0 f_305(v793:0, v794:0, v795:0, v796:0, v797:0, v798:0, v799:0, 1, v801:0, v802:0, 1 + v915:0, v804:0, v805:0, v806:0, v807:0, 0, 3, 2, 4) -> f_305(v793:0, v794:0, v795:0, v796:0, v797:0, v798:0, v799:0, 1, 1 + v915:0, v802:0, v915:0, v804:0, v805:0, v806:0, v807:0, 0, 3, 2, 4) :|: v801:0 > 1 && v915:0 > -1 Filtered unneeded arguments: f_305(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19) -> f_305(x6, x7, x9, x11) Removed division, modulo operations, cleaned up constraints. Obtained 2 rules.P rules: f_305(sum~cons_1~v915:0, sum~cons_1~v962:0, cons_1, cons_0) -> f_305(1 + v915:0, v962:0, 1 + v915:0, v915:0) :|: v915:0 > 0 && v962:0 > 0 && sum~cons_1~v915:0 = 1 + v915:0 && sum~cons_1~v962:0 = 1 + v962:0 && cons_1 = 1 && cons_0 = 0 f_305(v798:0, v799:0, v801:0, sum~cons_1~v915:0) -> f_305(v798:0, v799:0, 1 + v915:0, v915:0) :|: v801:0 > 1 && v915:0 > -1 && sum~cons_1~v915:0 = 1 + v915:0 ---------------------------------------- (9) Obligation: Rules: f_305(sum~cons_1~v915:0, sum~cons_1~v962:0, cons_1, cons_0) -> f_305(1 + v915:0, v962:0, 1 + v915:0, v915:0) :|: v915:0 > 0 && v962:0 > 0 && sum~cons_1~v915:0 = 1 + v915:0 && sum~cons_1~v962:0 = 1 + v962:0 && cons_1 = 1 && cons_0 = 0 f_305(x, x1, x2, x3) -> f_305(x, x1, 1 + x4, x4) :|: x2 > 1 && x4 > -1 && x3 = 1 + x4 ---------------------------------------- (10) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (11) Obligation: Rules: f_305(sum~cons_1~v915:0:0, sum~cons_1~v962:0:0, cons_1, cons_0) -> f_305(1 + v915:0:0, v962:0:0, 1 + v915:0:0, v915:0:0) :|: v915:0:0 > 0 && v962:0:0 > 0 && sum~cons_1~v915:0:0 = 1 + v915:0:0 && sum~cons_1~v962:0:0 = 1 + v962:0:0 && cons_1 = 1 && cons_0 = 0 f_305(x:0, x1:0, x2:0, sum~cons_1~x4:0) -> f_305(x:0, x1:0, 1 + x4:0, x4:0) :|: x2:0 > 1 && x4:0 > -1 && sum~cons_1~x4:0 = 1 + x4:0 ---------------------------------------- (12) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f_305(x, x1, x2, x3)] = -2 - x + x*x1 + x^2 - 4*x1 + x1^2 + x3 The following rules are decreasing: f_305(x:0, x1:0, x2:0, sum~cons_1~x4:0) -> f_305(x:0, x1:0, 1 + x4:0, x4:0) :|: x2:0 > 1 && x4:0 > -1 && sum~cons_1~x4:0 = 1 + x4:0 The following rules are bounded: f_305(sum~cons_1~v915:0:0, sum~cons_1~v962:0:0, cons_1, cons_0) -> f_305(1 + v915:0:0, v962:0:0, 1 + v915:0:0, v915:0:0) :|: v915:0:0 > 0 && v962:0:0 > 0 && sum~cons_1~v915:0:0 = 1 + v915:0:0 && sum~cons_1~v962:0:0 = 1 + v962:0:0 && cons_1 = 1 && cons_0 = 0 ---------------------------------------- (13) Complex Obligation (AND) ---------------------------------------- (14) Obligation: Rules: f_305(sum~cons_1~v915:0:0, sum~cons_1~v962:0:0, cons_1, cons_0) -> f_305(1 + v915:0:0, v962:0:0, 1 + v915:0:0, v915:0:0) :|: v915:0:0 > 0 && v962:0:0 > 0 && sum~cons_1~v915:0:0 = 1 + v915:0:0 && sum~cons_1~v962:0:0 = 1 + v962:0:0 && cons_1 = 1 && cons_0 = 0 ---------------------------------------- (15) TerminationGraphProcessor (EQUIVALENT) Constructed the termination graph and obtained no non-trivial SCC(s). ---------------------------------------- (16) YES ---------------------------------------- (17) Obligation: Rules: f_305(x:0, x1:0, x2:0, sum~cons_1~x4:0) -> f_305(x:0, x1:0, 1 + x4:0, x4:0) :|: x2:0 > 1 && x4:0 > -1 && sum~cons_1~x4:0 = 1 + x4:0 ---------------------------------------- (18) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (19) Obligation: Rules: f_305(x:0:0, x1:0:0, x2:0:0, sum~cons_1~x4:0:0) -> f_305(x:0:0, x1:0:0, 1 + x4:0:0, x4:0:0) :|: x2:0:0 > 1 && x4:0:0 > -1 && sum~cons_1~x4:0:0 = 1 + x4:0:0 ---------------------------------------- (20) IntTRSUnneededArgumentFilterProof (EQUIVALENT) Some arguments are removed because they cannot influence termination. We removed arguments according to the following replacements: f_305(x1, x2, x3, x4) -> f_305(x3, x4) ---------------------------------------- (21) Obligation: Rules: f_305(x2:0:0, sum~cons_1~x4:0:0) -> f_305(1 + x4:0:0, x4:0:0) :|: x2:0:0 > 1 && x4:0:0 > -1 && sum~cons_1~x4:0:0 = 1 + x4:0:0 ---------------------------------------- (22) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f_305 ] = f_305_2 The following rules are decreasing: f_305(x2:0:0, sum~cons_1~x4:0:0) -> f_305(1 + x4:0:0, x4:0:0) :|: x2:0:0 > 1 && x4:0:0 > -1 && sum~cons_1~x4:0:0 = 1 + x4:0:0 The following rules are bounded: f_305(x2:0:0, sum~cons_1~x4:0:0) -> f_305(1 + x4:0:0, x4:0:0) :|: x2:0:0 > 1 && x4:0:0 > -1 && sum~cons_1~x4:0:0 = 1 + x4:0:0 ---------------------------------------- (23) YES ---------------------------------------- (24) Obligation: SCC ---------------------------------------- (25) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 13 rulesP rules: f_198(v158, v159, v160, v161, v162, v163, 1, v165, v166, v167, v168, v169, v170, 0, 3, 4) -> f_200(v158, v159, v160, v161, v162, v163, 1, v165, v166, v167, v168, v169, v170, 0, 3, 4) :|: 0 = 0 f_200(v158, v159, v160, v161, v162, v163, 1, v165, v166, v167, v168, v169, v170, 0, 3, 4) -> f_202(v158, v159, v160, v161, v162, v163, 1, v165, v166, v167, v168, v169, v170, 0, 3, 4) :|: TRUE f_202(v158, v159, v160, v161, v162, v163, 1, v165, v166, v167, v168, v169, v170, 0, 3, 4) -> f_204(v158, v159, v160, v161, v162, v163, 1, v166, v165, v167, v168, v169, v170, 0, 3, 4) :|: 0 = 0 f_204(v158, v159, v160, v161, v162, v163, 1, v166, v165, v167, v168, v169, v170, 0, 3, 4) -> f_206(v158, v159, v160, v161, v162, v163, 1, v166, v165, v167, v168, v169, v170, 0, 3, 2, 4) :|: 0 < v166 && 2 <= v165 && 2 <= v162 f_206(v158, v159, v160, v161, v162, v163, 1, v166, v165, v167, v168, v169, v170, 0, 3, 2, 4) -> f_209(v158, v159, v160, v161, v162, v163, 1, v166, v165, v167, v168, v169, v170, 0, 3, 2, 4) :|: 0 = 0 f_209(v158, v159, v160, v161, v162, v163, 1, v166, v165, v167, v168, v169, v170, 0, 3, 2, 4) -> f_213(v158, v159, v160, v161, v162, v163, 1, v166, v165, v167, v168, v169, v170, 0, 3, 2, 4) :|: TRUE f_213(v158, v159, v160, v161, v162, v163, 1, v166, v165, v167, v168, v169, v170, 0, 3, 2, 4) -> f_217(v158, v159, v160, v161, v162, v163, 1, v166, v167, v168, v169, v170, 0, 3, 2, 4) :|: 0 = 0 f_217(v158, v159, v160, v161, v162, v163, 1, v166, v167, v168, v169, v170, 0, 3, 2, 4) -> f_221(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 2, 4) :|: 1 + v252 = v166 && 0 <= v252 f_221(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 2, 4) -> f_225(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 2, 4) :|: TRUE f_225(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 2, 4) -> f_229(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 2, 4) :|: TRUE f_229(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 2, 4) -> f_233(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 2, 4) :|: TRUE f_233(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 2, 4) -> f_195(v158, v159, v160, v161, v162, v163, 1, v166, v252, v167, v168, v169, v170, 0, 3, 4) :|: TRUE f_195(v158, v159, v160, v161, v162, v163, 1, v165, v166, v167, v168, v169, v170, 0, 3, 4) -> f_198(v158, v159, v160, v161, v162, v163, 1, v165, v166, v167, v168, v169, v170, 0, 3, 4) :|: 0 = 0 Combined rules. Obtained 1 rulesP rules: f_198(v158:0, v159:0, v160:0, v161:0, v162:0, v163:0, 1, v165:0, 1 + v252:0, v167:0, v168:0, v169:0, v170:0, 0, 3, 4) -> f_198(v158:0, v159:0, v160:0, v161:0, v162:0, v163:0, 1, 1 + v252:0, v252:0, v167:0, v168:0, v169:0, v170:0, 0, 3, 4) :|: v165:0 > 1 && v252:0 > -1 && v162:0 > 1 Filtered unneeded arguments: f_198(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16) -> f_198(x5, x8, x9) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_198(v162:0, v165:0, sum~cons_1~v252:0) -> f_198(v162:0, 1 + v252:0, v252:0) :|: v252:0 > -1 && v162:0 > 1 && v165:0 > 1 && sum~cons_1~v252:0 = 1 + v252:0 ---------------------------------------- (26) Obligation: Rules: f_198(v162:0, v165:0, sum~cons_1~v252:0) -> f_198(v162:0, 1 + v252:0, v252:0) :|: v252:0 > -1 && v162:0 > 1 && v165:0 > 1 && sum~cons_1~v252:0 = 1 + v252:0 ---------------------------------------- (27) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (28) Obligation: Rules: f_198(v162:0:0, v165:0:0, sum~cons_1~v252:0:0) -> f_198(v162:0:0, 1 + v252:0:0, v252:0:0) :|: v252:0:0 > -1 && v162:0:0 > 1 && v165:0:0 > 1 && sum~cons_1~v252:0:0 = 1 + v252:0:0 ---------------------------------------- (29) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f_198(x, x1, x2)] = x2 The following rules are decreasing: f_198(v162:0:0, v165:0:0, sum~cons_1~v252:0:0) -> f_198(v162:0:0, 1 + v252:0:0, v252:0:0) :|: v252:0:0 > -1 && v162:0:0 > 1 && v165:0:0 > 1 && sum~cons_1~v252:0:0 = 1 + v252:0:0 The following rules are bounded: f_198(v162:0:0, v165:0:0, sum~cons_1~v252:0:0) -> f_198(v162:0:0, 1 + v252:0:0, v252:0:0) :|: v252:0:0 > -1 && v162:0:0 > 1 && v165:0:0 > 1 && sum~cons_1~v252:0:0 = 1 + v252:0:0 ---------------------------------------- (30) YES