YES proof of /export/starexec/sandbox/benchmark/theBenchmark.c # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination of the given C Problem could be proven: (0) C Problem (1) CToLLVMProof [EQUIVALENT, 176 ms] (2) LLVM problem (3) LLVMToTerminationGraphProof [EQUIVALENT, 6257 ms] (4) LLVM Symbolic Execution Graph (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] (6) LLVM Symbolic Execution SCC (7) SCC2IRS [SOUND, 109 ms] (8) IntTRS (9) IntTRSCompressionProof [EQUIVALENT, 0 ms] (10) IntTRS (11) PolynomialOrderProcessor [EQUIVALENT, 15 ms] (12) YES ---------------------------------------- (0) Obligation: c file /export/starexec/sandbox/benchmark/theBenchmark.c ---------------------------------------- (1) CToLLVMProof (EQUIVALENT) Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. ---------------------------------------- (2) Obligation: LLVM Problem Aliases: Data layout: "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" Machine: "x86_64-pc-linux-gnu" Type definitions: Global variables: Function declarations and definitions: *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc *BasicFunctionTypename: "test_fun" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (x i32, y i32) variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %2 = alloca i32, align 4 %x_ref = alloca *i32, align 8 %y_ref = alloca *i32, align 8 %c = alloca *i32, align 8 store %x, %1 store %y, %2 %3 = alloca i8, numElementsLit: 4 %4 = bitcast *i8 %3 to *i32 store %4, %x_ref %5 = alloca i8, numElementsLit: 4 %6 = bitcast *i8 %5 to *i32 store %6, %y_ref %7 = alloca i8, numElementsLit: 4 %8 = bitcast *i8 %7 to *i32 store %8, %c %9 = load %1 %10 = load %x_ref store %9, %10 %11 = load %2 %12 = load %y_ref store %11, %12 %13 = load %c store 0, %13 br %14 14: %15 = load %x_ref %16 = load %15 %17 = icmp sgt %16 0 br %17, %18, %22 18: %19 = load %y_ref %20 = load %19 %21 = icmp sgt %20 0 br %22 22: %23 = phi [0, %14], [%21, %18] br %23, %24, %37 24: %25 = load %x_ref %26 = load %25 %27 = sub %26 1 %28 = load %x_ref store %27, %28 %29 = load %y_ref %30 = load %29 %31 = sub %30 1 %32 = load %y_ref store %31, %32 %33 = load %c %34 = load %33 %35 = add %34 1 %36 = load %c store %35, %36 br %14 37: %38 = load %c %39 = load %38 ret %39 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 store 0, %1 %2 = call i32 @__VERIFIER_nondet_int() %3 = call i32 @__VERIFIER_nondet_int() %4 = call i32 @test_fun(i32 %2, i32 %3) ret %4 Analyze Termination of all function calls matching the pattern: main() ---------------------------------------- (3) LLVMToTerminationGraphProof (EQUIVALENT) Constructed symbolic execution graph for LLVM program and proved memory safety. ---------------------------------------- (4) Obligation: SE Graph ---------------------------------------- (5) SymbolicExecutionGraphToSCCProof (SOUND) Splitted symbolic execution graph to 1 SCC. ---------------------------------------- (6) Obligation: SCC ---------------------------------------- (7) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 28 rulesP rules: f_508(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v639, 1, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) -> f_509(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) :|: 0 = 0 f_509(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) -> f_510(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 < v642 && 2 <= v639 && 2 <= v629 f_510(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_512(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_512(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_514(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE f_514(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_516(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_516(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_518(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_518(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_520(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 < v643 && 2 <= v641 && 2 <= v630 f_520(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_523(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_523(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_526(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_526(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_528(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE f_528(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_530(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_530(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_532(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_532(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_534(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 1 + v725 = v642 && 0 <= v725 f_534(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_536(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_536(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_537(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE f_537(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_538(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_538(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_539(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_539(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_540(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 1 + v727 = v643 && 0 <= v727 f_540(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_541(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_541(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_542(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE f_542(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_543(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_543(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_544(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_544(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_545(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: v729 = 1 + v645 && 2 <= v729 f_545(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_546(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_546(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_547(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE f_547(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_548(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE f_548(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_507(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) :|: TRUE f_507(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v639, 1, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) -> f_508(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v639, 1, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) :|: 0 = 0 Combined rules. Obtained 1 rulesP rules: f_508(v629:0, v630:0, v631:0, v632:0, v633:0, v634:0, v635:0, v636:0, v637:0, v638:0, v639:0, 1, v641:0, 1 + v725:0, 1 + v727:0, v644:0, v645:0, v646:0, v647:0, v648:0, v649:0, v650:0, v651:0, v652:0, v653:0, v654:0, v655:0, 0, 3, 7, 4, 8) -> f_508(v629:0, v630:0, v631:0, v632:0, v633:0, v634:0, v635:0, v636:0, v637:0, v638:0, 1 + v725:0, 1, 1 + v727:0, v725:0, v727:0, v645:0, 1 + v645:0, v646:0, v647:0, v648:0, v649:0, v650:0, v651:0, v652:0, v653:0, v654:0, v655:0, 0, 3, 7, 4, 8) :|: v639:0 > 1 && v725:0 > -1 && v629:0 > 1 && v641:0 > 1 && v727:0 > -1 && v630:0 > 1 && v645:0 > 0 Filtered unneeded arguments: f_508(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32) -> f_508(x1, x2, x11, x13, x14, x15, x17) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_508(v629:0, v630:0, v639:0, v641:0, sum~cons_1~v725:0, sum~cons_1~v727:0, v645:0) -> f_508(v629:0, v630:0, 1 + v725:0, 1 + v727:0, v725:0, v727:0, 1 + v645:0) :|: v725:0 > -1 && v639:0 > 1 && v629:0 > 1 && v641:0 > 1 && v727:0 > -1 && v645:0 > 0 && v630:0 > 1 && sum~cons_1~v725:0 = 1 + v725:0 && sum~cons_1~v727:0 = 1 + v727:0 ---------------------------------------- (8) Obligation: Rules: f_508(v629:0, v630:0, v639:0, v641:0, sum~cons_1~v725:0, sum~cons_1~v727:0, v645:0) -> f_508(v629:0, v630:0, 1 + v725:0, 1 + v727:0, v725:0, v727:0, 1 + v645:0) :|: v725:0 > -1 && v639:0 > 1 && v629:0 > 1 && v641:0 > 1 && v727:0 > -1 && v645:0 > 0 && v630:0 > 1 && sum~cons_1~v725:0 = 1 + v725:0 && sum~cons_1~v727:0 = 1 + v727:0 ---------------------------------------- (9) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (10) Obligation: Rules: f_508(v629:0:0, v630:0:0, v639:0:0, v641:0:0, sum~cons_1~v725:0:0, sum~cons_1~v727:0:0, v645:0:0) -> f_508(v629:0:0, v630:0:0, 1 + v725:0:0, 1 + v727:0:0, v725:0:0, v727:0:0, 1 + v645:0:0) :|: v645:0:0 > 0 && v630:0:0 > 1 && v727:0:0 > -1 && v641:0:0 > 1 && v629:0:0 > 1 && v639:0:0 > 1 && v725:0:0 > -1 && sum~cons_1~v725:0:0 = 1 + v725:0:0 && sum~cons_1~v727:0:0 = 1 + v727:0:0 ---------------------------------------- (11) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f_508(x, x1, x2, x3, x4, x5, x6)] = x4 The following rules are decreasing: f_508(v629:0:0, v630:0:0, v639:0:0, v641:0:0, sum~cons_1~v725:0:0, sum~cons_1~v727:0:0, v645:0:0) -> f_508(v629:0:0, v630:0:0, 1 + v725:0:0, 1 + v727:0:0, v725:0:0, v727:0:0, 1 + v645:0:0) :|: v645:0:0 > 0 && v630:0:0 > 1 && v727:0:0 > -1 && v641:0:0 > 1 && v629:0:0 > 1 && v639:0:0 > 1 && v725:0:0 > -1 && sum~cons_1~v725:0:0 = 1 + v725:0:0 && sum~cons_1~v727:0:0 = 1 + v727:0:0 The following rules are bounded: f_508(v629:0:0, v630:0:0, v639:0:0, v641:0:0, sum~cons_1~v725:0:0, sum~cons_1~v727:0:0, v645:0:0) -> f_508(v629:0:0, v630:0:0, 1 + v725:0:0, 1 + v727:0:0, v725:0:0, v727:0:0, 1 + v645:0:0) :|: v645:0:0 > 0 && v630:0:0 > 1 && v727:0:0 > -1 && v641:0:0 > 1 && v629:0:0 > 1 && v639:0:0 > 1 && v725:0:0 > -1 && sum~cons_1~v725:0:0 = 1 + v725:0:0 && sum~cons_1~v727:0:0 = 1 + v727:0:0 ---------------------------------------- (12) YES