/export/starexec/sandbox/solver/bin/starexec_run_c /export/starexec/sandbox/benchmark/theBenchmark.c /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox/benchmark/theBenchmark.c # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination of the given C Problem could be proven: (0) C Problem (1) CToLLVMProof [EQUIVALENT, 173 ms] (2) LLVM problem (3) LLVMToTerminationGraphProof [EQUIVALENT, 988 ms] (4) LLVM Symbolic Execution Graph (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] (6) LLVM Symbolic Execution SCC (7) SCC2IRS [SOUND, 0 ms] (8) IntTRS (9) IntTRSCompressionProof [EQUIVALENT, 0 ms] (10) IntTRS (11) RankingReductionPairProof [EQUIVALENT, 32 ms] (12) YES ---------------------------------------- (0) Obligation: c file /export/starexec/sandbox/benchmark/theBenchmark.c ---------------------------------------- (1) CToLLVMProof (EQUIVALENT) Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. ---------------------------------------- (2) Obligation: LLVM Problem Aliases: Data layout: "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" Machine: "x86_64-pc-linux-gnu" Type definitions: Global variables: Function declarations and definitions: *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %k = alloca i32, align 4 %a = alloca [1048 x i32], align 16 %x = alloca i32, align 4 store 0, %1 %2 = call i32 @__VERIFIER_nondet_int() store %2, %k %3 = load %k %4 = icmp sge %3 0 br %4, %5, %29 5: %6 = load %k %7 = icmp slt %6 1048 br %7, %8, %29 8: %9 = getelementptr %a, 0, 0 %10 = load %9 %11 = icmp eq %10 23 br %11, %12, %28 12: %13 = load %k %14 = sext i32 %13 to i64 %15 = getelementptr %a, 0, %14 %16 = load %15 %17 = icmp eq %16 42 br %17, %18, %28 18: %19 = call i32 @__VERIFIER_nondet_int() store %19, %x br %20 20: %21 = load %x %22 = icmp sge %21 0 br %22, %23, %27 23: %24 = load %x %25 = load %k %26 = sub %24 %25 store %26, %x br %20 27: br %28 28: br %29 29: ret 0 Analyze Termination of all function calls matching the pattern: main() ---------------------------------------- (3) LLVMToTerminationGraphProof (EQUIVALENT) Constructed symbolic execution graph for LLVM program and proved memory safety. ---------------------------------------- (4) Obligation: SE Graph ---------------------------------------- (5) SymbolicExecutionGraphToSCCProof (SOUND) Splitted symbolic execution graph to 1 SCC. ---------------------------------------- (6) Obligation: SCC ---------------------------------------- (7) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 10 rulesP rules: f_188(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v123, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_189(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v123, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: 0 <= v124 && 1 <= v123 f_189(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v123, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_191(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v123, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: 0 = 0 f_191(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v123, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_193(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v123, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: TRUE f_193(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v123, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_195(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: 0 = 0 f_195(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_197(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: 0 = 0 f_197(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_199(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v177, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: v177 + v117 = v124 && 0 <= 1047 + v177 f_199(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v177, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_200(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v177, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: TRUE f_200(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v177, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_201(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v177, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: TRUE f_201(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v177, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_187(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v177, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: 1 <= v113 && 1 <= v114 && 1 <= v115 && 1 <= v116 && 1 <= v117 && v117 <= 1047 && 5 <= v120 && 0 <= v122 && 0 <= v124 && 0 <= 1047 + v177 && 4 <= v125 && 4 <= v126 && 4192 <= v127 && 4 <= v128 && v113 <= v125 && v114 <= v126 && v115 <= v127 && v116 <= v128 f_187(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v123, v124, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) -> f_188(v113, v114, v115, v116, v117, 1, 23, v120, 42, v122, v124, v123, v125, v126, v127, v128, 0, 3, 4191, 4, 1047, 5, 4192) :|: 0 = 0 Combined rules. Obtained 1 rulesP rules: f_188(v113:0, v114:0, v115:0, v116:0, v117:0, 1, 23, v120:0, 42, v122:0, v177:0 + v117:0, v123:0, v125:0, v126:0, v127:0, v128:0, 0, 3, 4191, 4, 1047, 5, 4192) -> f_188(v113:0, v114:0, v115:0, v116:0, v117:0, 1, 23, v120:0, 42, v122:0, v177:0, v177:0 + v117:0, v125:0, v126:0, v127:0, v128:0, 0, 3, 4191, 4, 1047, 5, 4192) :|: v114:0 > 0 && v113:0 > 0 && v115:0 > 0 && v116:0 > 0 && v117:0 > 0 && v117:0 < 1048 && v120:0 > 4 && v122:0 > -1 && v177:0 + v117:0 > -1 && v177:0 > -1048 && v125:0 > 3 && v123:0 > 0 && v126:0 > 3 && v127:0 > 4191 && v128:0 > 3 && v125:0 >= v113:0 && v126:0 >= v114:0 && v128:0 >= v116:0 && v127:0 >= v115:0 Filtered unneeded arguments: f_188(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23) -> f_188(x1, x2, x3, x4, x5, x8, x10, x11, x12, x13, x14, x15, x16) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_188(v113:0, v114:0, v115:0, v116:0, v117:0, v120:0, v122:0, sum~v177:0~v117:0, v123:0, v125:0, v126:0, v127:0, v128:0) -> f_188(v113:0, v114:0, v115:0, v116:0, v117:0, v120:0, v122:0, v177:0, v177:0 + v117:0, v125:0, v126:0, v127:0, v128:0) :|: v113:0 > 0 && v114:0 > 0 && v115:0 > 0 && v116:0 > 0 && v117:0 > 0 && v117:0 < 1048 && v120:0 > 4 && v122:0 > -1 && v177:0 + v117:0 > -1 && v177:0 > -1048 && v125:0 > 3 && v123:0 > 0 && v126:0 > 3 && v127:0 > 4191 && v128:0 > 3 && v125:0 >= v113:0 && v126:0 >= v114:0 && v127:0 >= v115:0 && v128:0 >= v116:0 && sum~v177:0~v117:0 = v177:0 + v117:0 ---------------------------------------- (8) Obligation: Rules: f_188(v113:0, v114:0, v115:0, v116:0, v117:0, v120:0, v122:0, sum~v177:0~v117:0, v123:0, v125:0, v126:0, v127:0, v128:0) -> f_188(v113:0, v114:0, v115:0, v116:0, v117:0, v120:0, v122:0, v177:0, v177:0 + v117:0, v125:0, v126:0, v127:0, v128:0) :|: v113:0 > 0 && v114:0 > 0 && v115:0 > 0 && v116:0 > 0 && v117:0 > 0 && v117:0 < 1048 && v120:0 > 4 && v122:0 > -1 && v177:0 + v117:0 > -1 && v177:0 > -1048 && v125:0 > 3 && v123:0 > 0 && v126:0 > 3 && v127:0 > 4191 && v128:0 > 3 && v125:0 >= v113:0 && v126:0 >= v114:0 && v127:0 >= v115:0 && v128:0 >= v116:0 && sum~v177:0~v117:0 = v177:0 + v117:0 ---------------------------------------- (9) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (10) Obligation: Rules: f_188(v113:0:0, v114:0:0, v115:0:0, v116:0:0, v117:0:0, v120:0:0, v122:0:0, sum~v177:0:0~v117:0:0, v123:0:0, v125:0:0, v126:0:0, v127:0:0, v128:0:0) -> f_188(v113:0:0, v114:0:0, v115:0:0, v116:0:0, v117:0:0, v120:0:0, v122:0:0, v177:0:0, v177:0:0 + v117:0:0, v125:0:0, v126:0:0, v127:0:0, v128:0:0) :|: v127:0:0 >= v115:0:0 && v128:0:0 >= v116:0:0 && v126:0:0 >= v114:0:0 && v125:0:0 >= v113:0:0 && v128:0:0 > 3 && v127:0:0 > 4191 && v126:0:0 > 3 && v123:0:0 > 0 && v125:0:0 > 3 && v177:0:0 > -1048 && v177:0:0 + v117:0:0 > -1 && v122:0:0 > -1 && v120:0:0 > 4 && v117:0:0 < 1048 && v117:0:0 > 0 && v116:0:0 > 0 && v115:0:0 > 0 && v114:0:0 > 0 && v113:0:0 > 0 && sum~v177:0:0~v117:0:0 = v177:0:0 + v117:0:0 ---------------------------------------- (11) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f_188 ] = f_188_8 The following rules are decreasing: f_188(v113:0:0, v114:0:0, v115:0:0, v116:0:0, v117:0:0, v120:0:0, v122:0:0, sum~v177:0:0~v117:0:0, v123:0:0, v125:0:0, v126:0:0, v127:0:0, v128:0:0) -> f_188(v113:0:0, v114:0:0, v115:0:0, v116:0:0, v117:0:0, v120:0:0, v122:0:0, v177:0:0, v177:0:0 + v117:0:0, v125:0:0, v126:0:0, v127:0:0, v128:0:0) :|: v127:0:0 >= v115:0:0 && v128:0:0 >= v116:0:0 && v126:0:0 >= v114:0:0 && v125:0:0 >= v113:0:0 && v128:0:0 > 3 && v127:0:0 > 4191 && v126:0:0 > 3 && v123:0:0 > 0 && v125:0:0 > 3 && v177:0:0 > -1048 && v177:0:0 + v117:0:0 > -1 && v122:0:0 > -1 && v120:0:0 > 4 && v117:0:0 < 1048 && v117:0:0 > 0 && v116:0:0 > 0 && v115:0:0 > 0 && v114:0:0 > 0 && v113:0:0 > 0 && sum~v177:0:0~v117:0:0 = v177:0:0 + v117:0:0 The following rules are bounded: f_188(v113:0:0, v114:0:0, v115:0:0, v116:0:0, v117:0:0, v120:0:0, v122:0:0, sum~v177:0:0~v117:0:0, v123:0:0, v125:0:0, v126:0:0, v127:0:0, v128:0:0) -> f_188(v113:0:0, v114:0:0, v115:0:0, v116:0:0, v117:0:0, v120:0:0, v122:0:0, v177:0:0, v177:0:0 + v117:0:0, v125:0:0, v126:0:0, v127:0:0, v128:0:0) :|: v127:0:0 >= v115:0:0 && v128:0:0 >= v116:0:0 && v126:0:0 >= v114:0:0 && v125:0:0 >= v113:0:0 && v128:0:0 > 3 && v127:0:0 > 4191 && v126:0:0 > 3 && v123:0:0 > 0 && v125:0:0 > 3 && v177:0:0 > -1048 && v177:0:0 + v117:0:0 > -1 && v122:0:0 > -1 && v120:0:0 > 4 && v117:0:0 < 1048 && v117:0:0 > 0 && v116:0:0 > 0 && v115:0:0 > 0 && v114:0:0 > 0 && v113:0:0 > 0 && sum~v177:0:0~v117:0:0 = v177:0:0 + v117:0:0 ---------------------------------------- (12) YES