/export/starexec/sandbox2/solver/bin/starexec_run_c /export/starexec/sandbox2/benchmark/theBenchmark.c /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox2/benchmark/theBenchmark.c # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination of the given C Problem could be proven: (0) C Problem (1) CToLLVMProof [EQUIVALENT, 173 ms] (2) LLVM problem (3) LLVMToTerminationGraphProof [EQUIVALENT, 3453 ms] (4) LLVM Symbolic Execution Graph (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] (6) AND (7) LLVM Symbolic Execution SCC (8) SCC2IRS [SOUND, 186 ms] (9) IntTRS (10) IntTRSCompressionProof [EQUIVALENT, 0 ms] (11) IntTRS (12) PolynomialOrderProcessor [EQUIVALENT, 0 ms] (13) IntTRS (14) TerminationGraphProcessor [EQUIVALENT, 6 ms] (15) IntTRS (16) IntTRSCompressionProof [EQUIVALENT, 0 ms] (17) IntTRS (18) IntTRSUnneededArgumentFilterProof [EQUIVALENT, 0 ms] (19) IntTRS (20) PolynomialOrderProcessor [EQUIVALENT, 0 ms] (21) YES (22) LLVM Symbolic Execution SCC (23) SCC2IRS [SOUND, 100 ms] (24) IntTRS (25) IntTRSCompressionProof [EQUIVALENT, 0 ms] (26) IntTRS (27) PolynomialOrderProcessor [EQUIVALENT, 13 ms] (28) YES (29) LLVM Symbolic Execution SCC (30) SCC2IRS [SOUND, 126 ms] (31) IntTRS (32) IntTRSCompressionProof [EQUIVALENT, 1 ms] (33) IntTRS (34) RankingReductionPairProof [EQUIVALENT, 15 ms] (35) YES ---------------------------------------- (0) Obligation: c file /export/starexec/sandbox2/benchmark/theBenchmark.c ---------------------------------------- (1) CToLLVMProof (EQUIVALENT) Compiled c-file /export/starexec/sandbox2/benchmark/theBenchmark.c to LLVM. ---------------------------------------- (2) Obligation: LLVM Problem Aliases: Data layout: "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" Machine: "x86_64-pc-linux-gnu" Type definitions: Global variables: Function declarations and definitions: *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %x = alloca *i32, align 8 %y = alloca *i32, align 8 %d = alloca *i32, align 8 store 0, %1 %2 = alloca i8, numElementsLit: 4 %3 = bitcast *i8 %2 to *i32 store %3, %x %4 = alloca i8, numElementsLit: 4 %5 = bitcast *i8 %4 to *i32 store %5, %y %6 = alloca i8, numElementsLit: 4 %7 = bitcast *i8 %6 to *i32 store %7, %d br %8 8: %9 = load %x %10 = load %9 %11 = icmp sgt %10 0 br %11, %12, %20 12: %13 = load %y %14 = load %13 %15 = icmp sgt %14 0 br %15, %16, %20 16: %17 = load %d %18 = load %17 %19 = icmp sgt %18 0 br %20 20: %21 = phi [0, %12], [0, %8], [%19, %16] br %21, %22, %44 22: %23 = call i32 @__VERIFIER_nondet_int() %24 = icmp ne %23 0 br %24, %25, %32 25: %26 = load %x %27 = load %26 %28 = sub %27 1 %29 = load %x store %28, %29 %30 = call i32 @__VERIFIER_nondet_int() %31 = load %d store %30, %31 br %43 32: %33 = call i32 @__VERIFIER_nondet_int() %34 = load %x store %33, %34 %35 = load %y %36 = load %35 %37 = sub %36 1 %38 = load %y store %37, %38 %39 = load %d %40 = load %39 %41 = sub %40 1 %42 = load %d store %41, %42 br %43 43: br %8 44: %45 = load %1 ret %45 Analyze Termination of all function calls matching the pattern: main() ---------------------------------------- (3) LLVMToTerminationGraphProof (EQUIVALENT) Constructed symbolic execution graph for LLVM program and proved memory safety. ---------------------------------------- (4) Obligation: SE Graph ---------------------------------------- (5) SymbolicExecutionGraphToSCCProof (SOUND) Splitted symbolic execution graph to 3 SCCs. ---------------------------------------- (6) Complex Obligation (AND) ---------------------------------------- (7) Obligation: SCC ---------------------------------------- (8) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 78 rulesP rules: f_544(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4887, v4888, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_547(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4887, v4888, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_547(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4887, v4888, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_549(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4888, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_549(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4888, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_551(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: 1 + v4958 = v4882 && 0 <= v4958 f_551(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_553(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_553(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_555(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: TRUE f_555(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4889, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_557(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4961, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: TRUE f_557(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4961, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_559(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4961, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_559(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4961, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_561(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4961, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: TRUE f_561(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4961, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_563(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4961, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: TRUE f_563(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4958, v4961, v4890, v4891, v4892, v4893, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) -> f_464(v4875, v4876, v4877, v4878, v4879, v4880, v4881, v4882, 1, v4884, v4885, v4886, v4890, v4891, v4892, v4893, v4958, v4961, v4894, v4895, v4896, v4897, v4898, v4899, v4900, 0, 3, 7, 2, 4, 8) :|: TRUE f_464(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2692, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2701, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_466(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2692, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2701, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: TRUE f_466(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2692, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2701, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_468(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2692, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2701, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_468(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2692, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2701, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_470(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_470(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_472(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 < v2701 && 2 <= v2692 && 2 <= v2697 f_472(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_475(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_475(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_478(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: TRUE f_478(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_481(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_481(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_484(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_484(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_487(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_487(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_490(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: TRUE f_490(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_493(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_493(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2695, v2696, v2697, v2698, v2699, v2700, v2692, v2702, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_496(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_496(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_499(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 < v2702 f_499(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_503(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_503(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_507(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_507(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_511(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: TRUE f_511(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v2696, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_515(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: TRUE f_515(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_519(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: v4048 != 0 f_515(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_520(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, 0, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 3, 7, 2, 4, 8) :|: v4048 = 0 f_519(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_523(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_523(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_527(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: TRUE f_527(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) -> f_444(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, v4048, v2692, v2701, v2702, v2697, v2698, v2699, v2700, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 0, 3, 7, 2, 4, 8) :|: TRUE f_444(v2557, v2558, v2559, v2560, v2561, v2562, v2563, v2564, 1, v2566, v2567, v2568, v2569, v2570, v2571, v2572, v2573, v2574, v2575, v2576, v2577, v2578, v2579, v2580, v2581, v2582, 0, 3, 7, 2, 4, 8) -> f_544(v2557, v2558, v2559, v2560, v2561, v2562, v2563, v2564, 1, v2566, v2567, v2568, v2569, v2570, v2571, v2572, v2573, v2574, v2575, v2576, v2577, v2578, v2579, v2580, v2581, v2582, 0, 3, 7, 2, 4, 8) :|: TRUE f_520(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, 0, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 3, 7, 2, 4, 8) -> f_524(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, 0, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 3, 7, 2, 4, 8) :|: 0 = 0 f_524(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, 0, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 3, 7, 2, 4, 8) -> f_528(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, 0, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 3, 7, 2, 4, 8) :|: TRUE f_528(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, 0, v2697, v2698, v2699, v2700, v2692, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 3, 7, 2, 4, 8) -> f_446(v2685, v2686, v2687, v2688, v2689, v2690, v2691, v2701, 1, v2694, v2702, 0, v2692, v2701, v2702, v2697, v2698, v2699, v2700, v2703, v2704, v2705, v2706, v2707, v2708, v2709, 3, 7, 2, 4, 8) :|: TRUE f_446(v2613, v2614, v2615, v2616, v2617, v2618, v2619, v2620, 1, v2622, v2623, 0, v2625, v2626, v2627, v2628, v2629, v2630, v2631, v2632, v2633, v2634, v2635, v2636, v2637, v2638, 3, 7, 2, 4, 8) -> f_546(v2613, v2614, v2615, v2616, v2617, v2618, v2619, v2620, 1, v2622, v2623, 0, v2625, v2626, v2627, v2628, v2629, v2630, v2631, v2632, v2633, v2634, v2635, v2636, v2637, v2638, 3, 7, 2, 4, 8) :|: TRUE f_546(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4946, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_548(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_548(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_550(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_550(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_552(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_552(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_554(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_554(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4947, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_556(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_556(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_558(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 1 + v4962 = v4940 && 0 <= v4962 f_558(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_560(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_560(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_562(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_562(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_564(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_564(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4948, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_565(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_565(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v4949, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_566(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 1 + v5027 = v4941 && 0 <= v5027 f_566(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_567(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_567(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_568(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_568(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_569(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_569(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_570(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_570(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_571(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_571(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4938, 1, v4940, v4941, 0, v4943, v4944, v4945, v4957, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_572(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_572(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_573(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 < v4957 f_573(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_575(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_575(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_577(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_577(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_580(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_580(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4940, v4941, 0, v4943, v4944, v4945, v4962, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_582(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_582(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_584(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 < v4962 && 2 <= v4940 f_584(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_586(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_586(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_588(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_588(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_591(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_591(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v4941, 0, v4943, v4944, v4945, v4940, v5027, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_593(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_593(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_595(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 < v5027 && 2 <= v4941 f_595(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_597(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_597(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_599(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: 0 = 0 f_599(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) -> f_532(v4931, v4932, v4933, v4934, v4935, v4936, v4937, v4957, 1, v4962, v5027, 0, v4943, v4944, v4945, v4940, v4941, v4950, v4951, v4952, v4953, v4954, v4955, v4956, 3, 7, 2, 4, 8) :|: TRUE f_532(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) -> f_535(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) :|: TRUE f_535(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) -> f_537(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) :|: TRUE f_537(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) -> f_539(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) :|: v4845 != 0 f_537(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) -> f_540(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) :|: v4845 = 0 f_539(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) -> f_541(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_541(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 0, 3, 7, 2, 4, 8) -> f_543(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 0, 3, 7, 2, 4, 8) :|: TRUE f_543(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 0, 3, 7, 2, 4, 8) -> f_544(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, v4845, v4410, v4411, v4412, v4405, v4413, v4414, v4408, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 0, 3, 7, 2, 4, 8) :|: TRUE f_540(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) -> f_542(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) :|: 0 = 0 f_542(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) -> f_545(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) :|: TRUE f_545(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4413, v4414, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) -> f_546(v4398, v4399, v4400, v4401, v4402, v4403, v4404, v4405, 1, v4407, v4408, 0, v4410, v4411, v4412, v4405, v4413, v4414, v4408, v4415, v4416, v4417, v4418, v4419, v4420, v4421, 3, 7, 2, 4, 8) :|: TRUE Combined rules. Obtained 6 rulesP rules: f_544(v4875:0, v4876:0, v4877:0, v4878:0, v4879:0, v4880:0, v4881:0, 1 + v4958:0, 1, v4884:0, v4885:0, v4886:0, v4887:0, v4888:0, v4889:0, v4890:0, v4891:0, v4892:0, v4893:0, v4894:0, v4895:0, v4896:0, v4897:0, v4898:0, v4899:0, v4900:0, 0, 3, 7, 2, 4, 8) -> f_544(v4875:0, v4876:0, v4877:0, v4878:0, v4879:0, v4880:0, v4881:0, v4958:0, 1, v4884:0, v4961:0, v4048:0, 1 + v4958:0, v4958:0, v4961:0, v4890:0, v4891:0, v4892:0, v4893:0, v4894:0, v4895:0, v4896:0, v4897:0, v4898:0, v4899:0, v4900:0, 0, 3, 7, 2, 4, 8) :|: v4958:0 > 0 && v4890:0 > 1 && v4048:0 < 0 && v4961:0 > 0 f_544(v4875:0, v4876:0, v4877:0, v4878:0, v4879:0, v4880:0, v4881:0, 1 + v4958:0, 1, v4884:0, v4885:0, v4886:0, v4887:0, v4888:0, v4889:0, v4890:0, v4891:0, v4892:0, v4893:0, v4894:0, v4895:0, v4896:0, v4897:0, v4898:0, v4899:0, v4900:0, 0, 3, 7, 2, 4, 8) -> f_544(v4875:0, v4876:0, v4877:0, v4878:0, v4879:0, v4880:0, v4881:0, v4958:0, 1, v4884:0, v4961:0, v4048:0, 1 + v4958:0, v4958:0, v4961:0, v4890:0, v4891:0, v4892:0, v4893:0, v4894:0, v4895:0, v4896:0, v4897:0, v4898:0, v4899:0, v4900:0, 0, 3, 7, 2, 4, 8) :|: v4958:0 > 0 && v4890:0 > 1 && v4048:0 > 0 && v4961:0 > 0 f_544(v4875:0, v4876:0, v4877:0, v4878:0, v4879:0, v4880:0, v4881:0, 1 + v4958:0, 1, 1 + v4962:0, v4885:0, v4886:0, v4887:0, v4888:0, v4889:0, v4890:0, v4891:0, v4892:0, v4893:0, v4894:0, v4895:0, v4896:0, v4897:0, v4898:0, v4899:0, v4900:0, 0, 3, 7, 2, 4, 8) -> f_537(v4875:0, v4876:0, v4877:0, v4878:0, v4879:0, v4880:0, v4881:0, v4957:0, 1, v4962:0, v5027:0, v4845:0, 0, 1 + v4958:0, v4958:0, 1 + v5027:0, 1 + v4962:0, 1 + v5027:0, v4894:0, v4895:0, v4896:0, v4897:0, v4898:0, v4899:0, v4900:0, 3, 7, 2, 4, 8) :|: v4958:0 > 0 && v4962:0 > 0 && v5027:0 > 0 && v4890:0 > 1 && v4957:0 > 0 f_537(v4398:0, v4399:0, v4400:0, v4401:0, v4402:0, v4403:0, v4404:0, v4405:0, 1, v4407:0, v4408:0, v4845:0, 0, v4410:0, v4411:0, v4412:0, v4413:0, v4414:0, v4415:0, v4416:0, v4417:0, v4418:0, v4419:0, v4420:0, v4421:0, 3, 7, 2, 4, 8) -> f_544(v4398:0, v4399:0, v4400:0, v4401:0, v4402:0, v4403:0, v4404:0, v4405:0, 1, v4407:0, v4408:0, v4845:0, v4410:0, v4411:0, v4412:0, v4405:0, v4413:0, v4414:0, v4408:0, v4415:0, v4416:0, v4417:0, v4418:0, v4419:0, v4420:0, v4421:0, 0, 3, 7, 2, 4, 8) :|: v4845:0 < 0 f_537(v4398:0, v4399:0, v4400:0, v4401:0, v4402:0, v4403:0, v4404:0, v4405:0, 1, v4407:0, v4408:0, v4845:0, 0, v4410:0, v4411:0, v4412:0, v4413:0, v4414:0, v4415:0, v4416:0, v4417:0, v4418:0, v4419:0, v4420:0, v4421:0, 3, 7, 2, 4, 8) -> f_544(v4398:0, v4399:0, v4400:0, v4401:0, v4402:0, v4403:0, v4404:0, v4405:0, 1, v4407:0, v4408:0, v4845:0, v4410:0, v4411:0, v4412:0, v4405:0, v4413:0, v4414:0, v4408:0, v4415:0, v4416:0, v4417:0, v4418:0, v4419:0, v4420:0, v4421:0, 0, 3, 7, 2, 4, 8) :|: v4845:0 > 0 f_537(v4398:0, v4399:0, v4400:0, v4401:0, v4402:0, v4403:0, v4404:0, v4405:0, 1, 1 + v4962:0, 1 + v5027:0, 0, 0, v4410:0, v4411:0, v4412:0, v4413:0, v4414:0, v4415:0, v4416:0, v4417:0, v4418:0, v4419:0, v4420:0, v4421:0, 3, 7, 2, 4, 8) -> f_537(v4398:0, v4399:0, v4400:0, v4401:0, v4402:0, v4403:0, v4404:0, v4957:0, 1, v4962:0, v5027:0, v4845:1, 0, v4410:0, v4411:0, v4412:0, 1 + v4962:0, 1 + v5027:0, v4415:0, v4416:0, v4417:0, v4418:0, v4419:0, v4420:0, v4421:0, 3, 7, 2, 4, 8) :|: v4962:0 > 0 && v5027:0 > 0 && v4957:0 > 0 Filtered unneeded arguments: f_544(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32) -> f_544(x8, x10, x16) f_537(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30) -> f_537(x8, x10, x11, x12) Removed division, modulo operations, cleaned up constraints. Obtained 5 rules.P rules: f_544(sum~cons_1~v4958:0, v4884:0, v4890:0) -> f_544(v4958:0, v4884:0, v4890:0) :|: v4958:0 > 0 && v4890:0 > 1 && sum~cons_1~v4958:0 = 1 + v4958:0 f_544(sum~cons_1~v4958:0, sum~cons_1~v4962:0, v4890:0) -> f_537(v4957:0, v4962:0, v5027:0, v4845:0) :|: v4962:0 > 0 && v4958:0 > 0 && v5027:0 > 0 && v4957:0 > 0 && v4890:0 > 1 && sum~cons_1~v4958:0 = 1 + v4958:0 && sum~cons_1~v4962:0 = 1 + v4962:0 f_537(v4405:0, v4407:0, v4408:0, v4845:0) -> f_544(v4405:0, v4407:0, v4405:0) :|: v4845:0 < 0 f_537(v4405:0, v4407:0, v4408:0, v4845:0) -> f_544(v4405:0, v4407:0, v4405:0) :|: v4845:0 > 0 f_537(v4405:0, sum~cons_1~v4962:0, sum~cons_1~v5027:0, cons_0) -> f_537(v4957:0, v4962:0, v5027:0, v4845:1) :|: v5027:0 > 0 && v4957:0 > 0 && v4962:0 > 0 && sum~cons_1~v4962:0 = 1 + v4962:0 && sum~cons_1~v5027:0 = 1 + v5027:0 && cons_0 = 0 ---------------------------------------- (9) Obligation: Rules: f_544(sum~cons_1~v4958:0, v4884:0, v4890:0) -> f_544(v4958:0, v4884:0, v4890:0) :|: v4958:0 > 0 && v4890:0 > 1 && sum~cons_1~v4958:0 = 1 + v4958:0 f_544(x, x1, x2) -> f_537(x3, x4, x5, x6) :|: x4 > 0 && x7 > 0 && x5 > 0 && x3 > 0 && x2 > 1 && x = 1 + x7 && x1 = 1 + x4 f_537(v4405:0, v4407:0, v4408:0, v4845:0) -> f_544(v4405:0, v4407:0, v4405:0) :|: v4845:0 < 0 f_537(x8, x9, x10, x11) -> f_544(x8, x9, x8) :|: x11 > 0 f_537(x12, x13, x14, x15) -> f_537(x16, x17, x18, x19) :|: x18 > 0 && x16 > 0 && x17 > 0 && x13 = 1 + x17 && x14 = 1 + x18 && x15 = 0 ---------------------------------------- (10) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (11) Obligation: Rules: f_544(sum~cons_1~x7:0, sum~cons_1~x4:0, x2:0) -> f_537(x3:0, x4:0, x5:0, x6:0) :|: x3:0 > 0 && x2:0 > 1 && x5:0 > 0 && x7:0 > 0 && x4:0 > 0 && sum~cons_1~x7:0 = 1 + x7:0 && sum~cons_1~x4:0 = 1 + x4:0 f_537(x8:0, x9:0, x10:0, x11:0) -> f_544(x8:0, x9:0, x8:0) :|: x11:0 > 0 f_537(x12:0, sum~cons_1~x17:0, sum~cons_1~x18:0, cons_0) -> f_537(x16:0, x17:0, x18:0, x19:0) :|: x18:0 > 0 && x16:0 > 0 && x17:0 > 0 && sum~cons_1~x17:0 = 1 + x17:0 && sum~cons_1~x18:0 = 1 + x18:0 && cons_0 = 0 f_544(sum~cons_1~v4958:0:0, v4884:0:0, v4890:0:0) -> f_544(v4958:0:0, v4884:0:0, v4890:0:0) :|: v4958:0:0 > 0 && v4890:0:0 > 1 && sum~cons_1~v4958:0:0 = 1 + v4958:0:0 f_537(v4405:0:0, v4407:0:0, v4408:0:0, v4845:0:0) -> f_544(v4405:0:0, v4407:0:0, v4405:0:0) :|: v4845:0:0 < 0 ---------------------------------------- (12) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f_544(x, x1, x2)] = -1 + x1 + x1^2 [f_537(x3, x4, x5, x6)] = -1 + x4 + x4^2 The following rules are decreasing: f_544(sum~cons_1~x7:0, sum~cons_1~x4:0, x2:0) -> f_537(x3:0, x4:0, x5:0, x6:0) :|: x3:0 > 0 && x2:0 > 1 && x5:0 > 0 && x7:0 > 0 && x4:0 > 0 && sum~cons_1~x7:0 = 1 + x7:0 && sum~cons_1~x4:0 = 1 + x4:0 f_537(x12:0, sum~cons_1~x17:0, sum~cons_1~x18:0, cons_0) -> f_537(x16:0, x17:0, x18:0, x19:0) :|: x18:0 > 0 && x16:0 > 0 && x17:0 > 0 && sum~cons_1~x17:0 = 1 + x17:0 && sum~cons_1~x18:0 = 1 + x18:0 && cons_0 = 0 The following rules are bounded: f_544(sum~cons_1~x7:0, sum~cons_1~x4:0, x2:0) -> f_537(x3:0, x4:0, x5:0, x6:0) :|: x3:0 > 0 && x2:0 > 1 && x5:0 > 0 && x7:0 > 0 && x4:0 > 0 && sum~cons_1~x7:0 = 1 + x7:0 && sum~cons_1~x4:0 = 1 + x4:0 f_537(x12:0, sum~cons_1~x17:0, sum~cons_1~x18:0, cons_0) -> f_537(x16:0, x17:0, x18:0, x19:0) :|: x18:0 > 0 && x16:0 > 0 && x17:0 > 0 && sum~cons_1~x17:0 = 1 + x17:0 && sum~cons_1~x18:0 = 1 + x18:0 && cons_0 = 0 ---------------------------------------- (13) Obligation: Rules: f_537(x8:0, x9:0, x10:0, x11:0) -> f_544(x8:0, x9:0, x8:0) :|: x11:0 > 0 f_544(sum~cons_1~v4958:0:0, v4884:0:0, v4890:0:0) -> f_544(v4958:0:0, v4884:0:0, v4890:0:0) :|: v4958:0:0 > 0 && v4890:0:0 > 1 && sum~cons_1~v4958:0:0 = 1 + v4958:0:0 f_537(v4405:0:0, v4407:0:0, v4408:0:0, v4845:0:0) -> f_544(v4405:0:0, v4407:0:0, v4405:0:0) :|: v4845:0:0 < 0 ---------------------------------------- (14) TerminationGraphProcessor (EQUIVALENT) Constructed the termination graph and obtained one non-trivial SCC. ---------------------------------------- (15) Obligation: Rules: f_544(sum~cons_1~v4958:0:0, v4884:0:0, v4890:0:0) -> f_544(v4958:0:0, v4884:0:0, v4890:0:0) :|: v4958:0:0 > 0 && v4890:0:0 > 1 && sum~cons_1~v4958:0:0 = 1 + v4958:0:0 ---------------------------------------- (16) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (17) Obligation: Rules: f_544(sum~cons_1~v4958:0:0:0, v4884:0:0:0, v4890:0:0:0) -> f_544(v4958:0:0:0, v4884:0:0:0, v4890:0:0:0) :|: v4958:0:0:0 > 0 && v4890:0:0:0 > 1 && sum~cons_1~v4958:0:0:0 = 1 + v4958:0:0:0 ---------------------------------------- (18) IntTRSUnneededArgumentFilterProof (EQUIVALENT) Some arguments are removed because they cannot influence termination. We removed arguments according to the following replacements: f_544(x1, x2, x3) -> f_544(x1, x3) ---------------------------------------- (19) Obligation: Rules: f_544(sum~cons_1~v4958:0:0:0, v4890:0:0:0) -> f_544(v4958:0:0:0, v4890:0:0:0) :|: v4958:0:0:0 > 0 && v4890:0:0:0 > 1 && sum~cons_1~v4958:0:0:0 = 1 + v4958:0:0:0 ---------------------------------------- (20) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f_544(x, x1)] = x The following rules are decreasing: f_544(sum~cons_1~v4958:0:0:0, v4890:0:0:0) -> f_544(v4958:0:0:0, v4890:0:0:0) :|: v4958:0:0:0 > 0 && v4890:0:0:0 > 1 && sum~cons_1~v4958:0:0:0 = 1 + v4958:0:0:0 The following rules are bounded: f_544(sum~cons_1~v4958:0:0:0, v4890:0:0:0) -> f_544(v4958:0:0:0, v4890:0:0:0) :|: v4958:0:0:0 > 0 && v4890:0:0:0 > 1 && sum~cons_1~v4958:0:0:0 = 1 + v4958:0:0:0 ---------------------------------------- (21) YES ---------------------------------------- (22) Obligation: SCC ---------------------------------------- (23) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 36 rulesP rules: f_263(v1, v3, v5, v7, v9, v12, v15, v18, 1, v20, v22, 0, v62, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_266(v1, v3, v5, v7, v9, v12, v15, v18, 1, v20, v22, 0, v62, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0 f_266(v1, v3, v5, v7, v9, v12, v15, v18, 1, v20, v22, 0, v62, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_269(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0 f_269(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_271(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 < v62 f_271(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_274(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0 f_274(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_277(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE f_277(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_280(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0 f_280(v1, v3, v5, v7, v9, v12, v15, v62, 1, v20, v22, 0, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_284(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0 f_284(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_288(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 < v67 && 2 <= v20 f_288(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_292(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_292(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_296(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: TRUE f_296(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_300(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_300(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v22, 0, v20, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_304(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_304(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_308(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 < v70 && 2 <= v22 f_308(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_312(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_312(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_316(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_316(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_320(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: TRUE f_320(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_324(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, v700, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: TRUE f_324(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, v700, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_329(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: v700 = 0 f_329(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_333(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_333(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_337(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: TRUE f_337(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_341(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: TRUE f_341(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_345(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_345(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_349(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: TRUE f_349(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_353(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_353(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v20, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_356(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_356(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_359(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 1 + v780 = v67 && 0 <= v780 f_359(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_362(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_362(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_365(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: TRUE f_365(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_368(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) :|: 0 = 0 f_368(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v22, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8, 2) -> f_371(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0 f_371(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_374(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 1 + v914 = v70 && 0 <= v914 f_374(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_378(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: 0 = 0 f_378(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_383(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE f_383(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_388(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE f_388(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_260(v1, v3, v5, v7, v9, v12, v15, v62, 1, v67, v70, 0, v728, v780, v914, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE f_260(v1, v3, v5, v7, v9, v12, v15, v18, 1, v20, v22, 0, v62, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) -> f_263(v1, v3, v5, v7, v9, v12, v15, v18, 1, v20, v22, 0, v62, v67, v70, v2, v4, v6, v8, v10, v13, v16, 3, 7, 4, 8) :|: TRUE Combined rules. Obtained 1 rulesP rules: f_263(v1:0, v3:0, v5:0, v7:0, v9:0, v12:0, v15:0, v18:0, 1, v20:0, v22:0, 0, v62:0, 1 + v780:0, 1 + v914:0, v2:0, v4:0, v6:0, v8:0, v10:0, v13:0, v16:0, 3, 7, 4, 8) -> f_263(v1:0, v3:0, v5:0, v7:0, v9:0, v12:0, v15:0, v62:0, 1, 1 + v780:0, 1 + v914:0, 0, v728:0, v780:0, v914:0, v2:0, v4:0, v6:0, v8:0, v10:0, v13:0, v16:0, 3, 7, 4, 8) :|: v62:0 > 0 && v20:0 > 1 && v780:0 > -1 && v22:0 > 1 && v914:0 > -1 Filtered unneeded arguments: f_263(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26) -> f_263(x10, x11, x13, x14, x15) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_263(v20:0, v22:0, v62:0, sum~cons_1~v780:0, sum~cons_1~v914:0) -> f_263(1 + v780:0, 1 + v914:0, v728:0, v780:0, v914:0) :|: v20:0 > 1 && v62:0 > 0 && v780:0 > -1 && v914:0 > -1 && v22:0 > 1 && sum~cons_1~v780:0 = 1 + v780:0 && sum~cons_1~v914:0 = 1 + v914:0 ---------------------------------------- (24) Obligation: Rules: f_263(v20:0, v22:0, v62:0, sum~cons_1~v780:0, sum~cons_1~v914:0) -> f_263(1 + v780:0, 1 + v914:0, v728:0, v780:0, v914:0) :|: v20:0 > 1 && v62:0 > 0 && v780:0 > -1 && v914:0 > -1 && v22:0 > 1 && sum~cons_1~v780:0 = 1 + v780:0 && sum~cons_1~v914:0 = 1 + v914:0 ---------------------------------------- (25) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (26) Obligation: Rules: f_263(v20:0:0, v22:0:0, v62:0:0, sum~cons_1~v780:0:0, sum~cons_1~v914:0:0) -> f_263(1 + v780:0:0, 1 + v914:0:0, v728:0:0, v780:0:0, v914:0:0) :|: v914:0:0 > -1 && v22:0:0 > 1 && v780:0:0 > -1 && v62:0:0 > 0 && v20:0:0 > 1 && sum~cons_1~v780:0:0 = 1 + v780:0:0 && sum~cons_1~v914:0:0 = 1 + v914:0:0 ---------------------------------------- (27) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f_263(x, x1, x2, x3, x4)] = x4 The following rules are decreasing: f_263(v20:0:0, v22:0:0, v62:0:0, sum~cons_1~v780:0:0, sum~cons_1~v914:0:0) -> f_263(1 + v780:0:0, 1 + v914:0:0, v728:0:0, v780:0:0, v914:0:0) :|: v914:0:0 > -1 && v22:0:0 > 1 && v780:0:0 > -1 && v62:0:0 > 0 && v20:0:0 > 1 && sum~cons_1~v780:0:0 = 1 + v780:0:0 && sum~cons_1~v914:0:0 = 1 + v914:0:0 The following rules are bounded: f_263(v20:0:0, v22:0:0, v62:0:0, sum~cons_1~v780:0:0, sum~cons_1~v914:0:0) -> f_263(1 + v780:0:0, 1 + v914:0:0, v728:0:0, v780:0:0, v914:0:0) :|: v914:0:0 > -1 && v22:0:0 > 1 && v780:0:0 > -1 && v62:0:0 > 0 && v20:0:0 > 1 && sum~cons_1~v780:0:0 = 1 + v780:0:0 && sum~cons_1~v914:0:0 = 1 + v914:0:0 ---------------------------------------- (28) YES ---------------------------------------- (29) Obligation: SCC ---------------------------------------- (30) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 30 rulesP rules: f_251(v1, v3, v5, v7, v9, v12, v15, v18, 1, v20, v22, v61, v63, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_253(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: 0 = 0 f_253(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_255(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 < v63 && 2 <= v18 f_255(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_258(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_258(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_261(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: TRUE f_261(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_264(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_264(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_267(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_267(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_270(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_270(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_273(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: TRUE f_273(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_276(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_276(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v22, v61, v18, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_279(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_279(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_282(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 < v66 f_282(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_286(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_286(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_290(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_290(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_294(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: TRUE f_294(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v61, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_298(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: TRUE f_298(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_302(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: v411 != 0 f_302(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_306(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_306(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_310(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: TRUE f_310(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_314(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) :|: 0 = 0 f_314(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v18, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8, 2) -> f_318(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: 0 = 0 f_318(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_322(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: 1 + v698 = v63 && 0 <= v698 f_322(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_326(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: 0 = 0 f_326(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_330(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: TRUE f_330(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_334(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: TRUE f_334(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_338(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: 0 = 0 f_338(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_342(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: TRUE f_342(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_346(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: TRUE f_346(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_350(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: TRUE f_350(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_249(v1, v3, v5, v7, v9, v12, v15, v63, 1, v20, v66, v411, v698, v702, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: TRUE f_249(v1, v3, v5, v7, v9, v12, v15, v18, 1, v20, v22, v61, v63, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) -> f_251(v1, v3, v5, v7, v9, v12, v15, v18, 1, v20, v22, v61, v63, v66, v2, v4, v6, v8, v10, v13, v16, 0, 3, 7, 4, 8) :|: 0 = 0 Combined rules. Obtained 2 rulesP rules: f_251(v1:0, v3:0, v5:0, v7:0, v9:0, v12:0, v15:0, v18:0, 1, v20:0, v22:0, v61:0, 1 + v698:0, v66:0, v2:0, v4:0, v6:0, v8:0, v10:0, v13:0, v16:0, 0, 3, 7, 4, 8) -> f_251(v1:0, v3:0, v5:0, v7:0, v9:0, v12:0, v15:0, 1 + v698:0, 1, v20:0, v66:0, v411:0, v698:0, v702:0, v2:0, v4:0, v6:0, v8:0, v10:0, v13:0, v16:0, 0, 3, 7, 4, 8) :|: v18:0 > 1 && v698:0 > -1 && v66:0 > 0 && v411:0 < 0 f_251(v1:0, v3:0, v5:0, v7:0, v9:0, v12:0, v15:0, v18:0, 1, v20:0, v22:0, v61:0, 1 + v698:0, v66:0, v2:0, v4:0, v6:0, v8:0, v10:0, v13:0, v16:0, 0, 3, 7, 4, 8) -> f_251(v1:0, v3:0, v5:0, v7:0, v9:0, v12:0, v15:0, 1 + v698:0, 1, v20:0, v66:0, v411:0, v698:0, v702:0, v2:0, v4:0, v6:0, v8:0, v10:0, v13:0, v16:0, 0, 3, 7, 4, 8) :|: v18:0 > 1 && v698:0 > -1 && v66:0 > 0 && v411:0 > 0 Filtered unneeded arguments: f_251(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26) -> f_251(x8, x13, x14) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_251(v18:0, sum~cons_1~v698:0, v66:0) -> f_251(1 + v698:0, v698:0, v702:0) :|: v698:0 > -1 && v66:0 > 0 && v18:0 > 1 && sum~cons_1~v698:0 = 1 + v698:0 ---------------------------------------- (31) Obligation: Rules: f_251(v18:0, sum~cons_1~v698:0, v66:0) -> f_251(1 + v698:0, v698:0, v702:0) :|: v698:0 > -1 && v66:0 > 0 && v18:0 > 1 && sum~cons_1~v698:0 = 1 + v698:0 ---------------------------------------- (32) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (33) Obligation: Rules: f_251(v18:0:0, sum~cons_1~v698:0:0, v66:0:0) -> f_251(1 + v698:0:0, v698:0:0, v702:0:0) :|: v698:0:0 > -1 && v66:0:0 > 0 && v18:0:0 > 1 && sum~cons_1~v698:0:0 = 1 + v698:0:0 ---------------------------------------- (34) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f_251 ] = f_251_2 The following rules are decreasing: f_251(v18:0:0, sum~cons_1~v698:0:0, v66:0:0) -> f_251(1 + v698:0:0, v698:0:0, v702:0:0) :|: v698:0:0 > -1 && v66:0:0 > 0 && v18:0:0 > 1 && sum~cons_1~v698:0:0 = 1 + v698:0:0 The following rules are bounded: f_251(v18:0:0, sum~cons_1~v698:0:0, v66:0:0) -> f_251(1 + v698:0:0, v698:0:0, v702:0:0) :|: v698:0:0 > -1 && v66:0:0 > 0 && v18:0:0 > 1 && sum~cons_1~v698:0:0 = 1 + v698:0:0 ---------------------------------------- (35) YES