/export/starexec/sandbox/solver/bin/starexec_run_c /export/starexec/sandbox/benchmark/theBenchmark.c /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox/benchmark/theBenchmark.c # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination of the given C Problem could be proven: (0) C Problem (1) CToLLVMProof [EQUIVALENT, 175 ms] (2) LLVM problem (3) LLVMToTerminationGraphProof [EQUIVALENT, 9043 ms] (4) LLVM Symbolic Execution Graph (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] (6) AND (7) LLVM Symbolic Execution SCC (8) SCC2IRS [SOUND, 152 ms] (9) IntTRS (10) IntTRSCompressionProof [EQUIVALENT, 0 ms] (11) IntTRS (12) RankingReductionPairProof [EQUIVALENT, 25 ms] (13) IntTRS (14) IntTRSCompressionProof [EQUIVALENT, 0 ms] (15) IntTRS (16) RankingReductionPairProof [EQUIVALENT, 6 ms] (17) YES (18) LLVM Symbolic Execution SCC (19) SCC2IRS [SOUND, 79 ms] (20) IntTRS (21) IntTRSCompressionProof [EQUIVALENT, 0 ms] (22) IntTRS (23) PolynomialOrderProcessor [EQUIVALENT, 12 ms] (24) YES (25) LLVM Symbolic Execution SCC (26) SCC2IRS [SOUND, 117 ms] (27) IntTRS (28) TerminationGraphProcessor [EQUIVALENT, 7 ms] (29) YES ---------------------------------------- (0) Obligation: c file /export/starexec/sandbox/benchmark/theBenchmark.c ---------------------------------------- (1) CToLLVMProof (EQUIVALENT) Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. ---------------------------------------- (2) Obligation: LLVM Problem Aliases: Data layout: "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" Machine: "x86_64-pc-linux-gnu" Type definitions: Global variables: Function declarations and definitions: *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc *BasicFunctionTypename: "test_fun" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (x i32, y i32) variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %2 = alloca i32, align 4 %x_ref = alloca *i32, align 8 %y_ref = alloca *i32, align 8 %c = alloca *i32, align 8 store %x, %1 store %y, %2 %3 = alloca i8, numElementsLit: 4 %4 = bitcast *i8 %3 to *i32 store %4, %x_ref %5 = alloca i8, numElementsLit: 4 %6 = bitcast *i8 %5 to *i32 store %6, %y_ref %7 = alloca i8, numElementsLit: 4 %8 = bitcast *i8 %7 to *i32 store %8, %c %9 = load %1 %10 = load %x_ref store %9, %10 %11 = load %2 %12 = load %y_ref store %11, %12 %13 = load %c store 0, %13 br %14 14: %15 = load %x_ref %16 = load %15 %17 = icmp sge %16 0 br %17, %18, %40 18: %19 = load %y_ref store 1, %19 br %20 20: %21 = load %x_ref %22 = load %21 %23 = load %y_ref %24 = load %23 %25 = icmp sgt %22 %24 br %25, %26, %35 26: %27 = load %y_ref %28 = load %27 %29 = mul 2 %28 %30 = load %y_ref store %29, %30 %31 = load %c %32 = load %31 %33 = add %32 1 %34 = load %c store %33, %34 br %20 35: %36 = load %x_ref %37 = load %36 %38 = sub %37 1 %39 = load %x_ref store %38, %39 br %14 40: %41 = load %c %42 = load %41 ret %42 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 store 0, %1 %2 = call i32 @__VERIFIER_nondet_int() %3 = call i32 @__VERIFIER_nondet_int() %4 = call i32 @test_fun(i32 %2, i32 %3) ret %4 Analyze Termination of all function calls matching the pattern: main() ---------------------------------------- (3) LLVMToTerminationGraphProof (EQUIVALENT) Constructed symbolic execution graph for LLVM program and proved memory safety. ---------------------------------------- (4) Obligation: SE Graph ---------------------------------------- (5) SymbolicExecutionGraphToSCCProof (SOUND) Splitted symbolic execution graph to 3 SCCs. ---------------------------------------- (6) Complex Obligation (AND) ---------------------------------------- (7) Obligation: SCC ---------------------------------------- (8) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 50 rulesP rules: f_714(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v950, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_715(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_715(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_716(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: v966 = 2 * v949 && 2 <= v966 f_716(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_717(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_717(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_718(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: TRUE f_718(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_719(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_719(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_720(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_720(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_721(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: v968 = 1 + v953 && 2 <= v968 f_721(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_722(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_722(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_723(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: TRUE f_723(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_724(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: TRUE f_724(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_725(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_725(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_726(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_726(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_727(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_727(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_728(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_728(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_729(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: v966 < v947 && 3 <= v947 && 4 <= v954 && 4 <= v937 f_728(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_730(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: v947 <= v966 f_729(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_731(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_731(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_733(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: TRUE f_733(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_713(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: TRUE f_713(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v950, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_714(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v949, v950, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_730(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 0, 3, 7, 2, 4, 8) -> f_732(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, 0, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 3, 7, 2, 4, 8) :|: 0 = 0 f_732(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, 0, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 3, 7, 2, 4, 8) -> f_734(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, 0, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 3, 7, 2, 4, 8) :|: TRUE f_734(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, 0, v949, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 3, 7, 2, 4, 8) -> f_759(v937, v938, v939, v940, v941, v942, v943, v944, v945, v946, v947, 1, v966, 0, v949, v966, v953, v968, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, v964, 3, 7, 2, 4, 8) :|: TRUE f_759(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1288, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_760(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1288, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 0 = 0 f_760(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1288, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_761(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 0 = 0 f_761(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_762(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 1 + v1299 = v1280 && 0 <= 1 + v1299 f_762(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_763(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 0 = 0 f_763(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_764(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: TRUE f_764(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_765(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: TRUE f_765(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_766(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 0 = 0 f_766(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 1, v1282, 0, v1284, v1285, v1286, v1287, v1299, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_767(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 0 = 0 f_767(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_768(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 0 <= v1299 && 1 <= v1280 f_768(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_770(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 0 = 0 f_770(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_772(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: TRUE f_772(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_774(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: 0 = 0 f_774(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_776(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: TRUE f_776(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_778(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: TRUE f_778(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) -> f_748(v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1299, 1, v1280, v1282, 0, v1284, v1285, v1286, v1287, v1289, v1290, v1291, v1292, v1293, v1294, v1295, v1296, v1297, v1298, 3, 7, 2, 4, 8) :|: TRUE f_748(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1162, v1163, 0, v1165, v1166, v1167, v1168, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_749(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1162, v1163, 0, v1165, v1166, v1167, v1168, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: 0 = 0 f_749(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1162, v1163, 0, v1165, v1166, v1167, v1168, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_750(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1163, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: 0 = 0 f_750(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1163, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_751(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1163, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: 0 = 0 f_751(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1163, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_752(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: 0 = 0 f_752(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_753(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: 1 < v1160 && 3 <= v1162 && 3 <= v1150 && 4 <= v1166 && 2 <= v1165 f_752(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_754(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: v1160 <= 1 && v1162 <= 2 f_753(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_755(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_755(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 0, 3, 7, 2, 4, 8) -> f_757(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 0, 3, 7, 2, 4, 8) :|: TRUE f_757(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 0, 3, 7, 2, 4, 8) -> f_713(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 1, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 0, 3, 7, 2, 4, 8) :|: TRUE f_754(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_756(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: 0 = 0 f_756(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_758(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: TRUE f_758(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) -> f_759(v1150, v1151, v1152, v1153, v1154, v1155, v1156, v1157, v1158, v1159, v1160, 1, 1, 0, v1165, v1166, v1167, v1168, v1162, v1169, v1170, v1171, v1172, v1173, v1174, v1175, v1176, v1177, v1178, 3, 7, 2, 4, 8) :|: TRUE Combined rules. Obtained 4 rulesP rules: f_714(v937:0, v938:0, v939:0, v940:0, v941:0, v942:0, v943:0, v944:0, v945:0, v946:0, v947:0, 1, v949:0, v950:0, v951:0, v952:0, v953:0, v954:0, v955:0, v956:0, v957:0, v958:0, v959:0, v960:0, v961:0, v962:0, v963:0, v964:0, 0, 3, 7, 2, 4, 8) -> f_714(v937:0, v938:0, v939:0, v940:0, v941:0, v942:0, v943:0, v944:0, v945:0, v946:0, v947:0, 1, 2 * v949:0, v949:0, 2 * v949:0, v953:0, 1 + v953:0, v954:0, v955:0, v956:0, v957:0, v958:0, v959:0, v960:0, v961:0, v962:0, v963:0, v964:0, 0, 3, 7, 2, 4, 8) :|: 2 * v949:0 > 1 && v953:0 > 0 && v947:0 > 2 && v947:0 > 2 * v949:0 && v937:0 > 3 && v954:0 > 3 f_714(v937:0, v938:0, v939:0, v940:0, v941:0, v942:0, v943:0, v944:0, v945:0, v946:0, 1 + v1299:0, 1, v949:0, v950:0, v951:0, v952:0, v953:0, v954:0, v955:0, v956:0, v957:0, v958:0, v959:0, v960:0, v961:0, v962:0, v963:0, v964:0, 0, 3, 7, 2, 4, 8) -> f_752(v937:0, v938:0, v939:0, v940:0, v941:0, v942:0, v943:0, v944:0, v945:0, v946:0, v1299:0, 1, 0, v949:0, 2 * v949:0, v953:0, 1 + v953:0, 1 + v1299:0, v955:0, v956:0, v957:0, v958:0, v959:0, v960:0, v961:0, v962:0, v963:0, v964:0, 3, 7, 2, 4, 8) :|: v1299:0 > -1 && 2 * v949:0 > 1 && v953:0 > 0 && 2 * v949:0 >= 1 + v1299:0 f_752(v1150:0, v1151:0, v1152:0, v1153:0, v1154:0, v1155:0, v1156:0, v1157:0, v1158:0, v1159:0, 1 + v1299:0, 1, 0, v1165:0, v1166:0, v1167:0, v1168:0, v1162:0, v1169:0, v1170:0, v1171:0, v1172:0, v1173:0, v1174:0, v1175:0, v1176:0, v1177:0, v1178:0, 3, 7, 2, 4, 8) -> f_752(v1150:0, v1151:0, v1152:0, v1153:0, v1154:0, v1155:0, v1156:0, v1157:0, v1158:0, v1159:0, v1299:0, 1, 0, v1165:0, v1166:0, v1167:0, v1168:0, 1 + v1299:0, v1169:0, v1170:0, v1171:0, v1172:0, v1173:0, v1174:0, v1175:0, v1176:0, v1177:0, v1178:0, 3, 7, 2, 4, 8) :|: v1299:0 > -1 && v1299:0 < 1 && v1162:0 < 3 f_752(v1150:0, v1151:0, v1152:0, v1153:0, v1154:0, v1155:0, v1156:0, v1157:0, v1158:0, v1159:0, v1160:0, 1, 0, v1165:0, v1166:0, v1167:0, v1168:0, v1162:0, v1169:0, v1170:0, v1171:0, v1172:0, v1173:0, v1174:0, v1175:0, v1176:0, v1177:0, v1178:0, 3, 7, 2, 4, 8) -> f_714(v1150:0, v1151:0, v1152:0, v1153:0, v1154:0, v1155:0, v1156:0, v1157:0, v1158:0, v1159:0, v1160:0, 1, 1, v1165:0, v1166:0, v1167:0, v1168:0, v1162:0, v1169:0, v1170:0, v1171:0, v1172:0, v1173:0, v1174:0, v1175:0, v1176:0, v1177:0, v1178:0, 0, 3, 7, 2, 4, 8) :|: v1162:0 > 2 && v1160:0 > 1 && v1150:0 > 2 && v1165:0 > 1 && v1166:0 > 3 Filtered unneeded arguments: f_714(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33, x34) -> f_714(x1, x11, x13, x17, x18) f_752(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33) -> f_752(x1, x11, x14, x15, x17, x18) Removed division, modulo operations, cleaned up constraints. Obtained 4 rules.P rules: f_714(v937:0, v947:0, v949:0, v953:0, v954:0) -> f_714(v937:0, v947:0, 2 * v949:0, 1 + v953:0, v954:0) :|: v953:0 > 0 && 2 * v949:0 > 1 && v947:0 > 2 && v947:0 > 2 * v949:0 && v954:0 > 3 && v937:0 > 3 f_714(v937:0, sum~cons_1~v1299:0, v949:0, v953:0, v954:0) -> f_752(v937:0, v1299:0, v949:0, 2 * v949:0, 1 + v953:0, 1 + v1299:0) :|: 2 * v949:0 > 1 && v1299:0 > -1 && 2 * v949:0 >= 1 + v1299:0 && v953:0 > 0 && sum~cons_1~v1299:0 = 1 + v1299:0 f_752(v1150:0, sum~cons_1~v1299:0, v1165:0, v1166:0, v1168:0, v1162:0) -> f_752(v1150:0, v1299:0, v1165:0, v1166:0, v1168:0, 1 + v1299:0) :|: v1299:0 < 1 && v1162:0 < 3 && v1299:0 > -1 && sum~cons_1~v1299:0 = 1 + v1299:0 f_752(v1150:0, v1160:0, v1165:0, v1166:0, v1168:0, v1162:0) -> f_714(v1150:0, v1160:0, 1, v1168:0, v1162:0) :|: v1160:0 > 1 && v1162:0 > 2 && v1150:0 > 2 && v1166:0 > 3 && v1165:0 > 1 ---------------------------------------- (9) Obligation: Rules: f_714(v937:0, v947:0, v949:0, v953:0, v954:0) -> f_714(v937:0, v947:0, 2 * v949:0, 1 + v953:0, v954:0) :|: v953:0 > 0 && 2 * v949:0 > 1 && v947:0 > 2 && v947:0 > 2 * v949:0 && v954:0 > 3 && v937:0 > 3 f_714(x, x1, x2, x3, x4) -> f_752(x, x5, x2, 2 * x2, 1 + x3, 1 + x5) :|: 2 * x2 > 1 && x5 > -1 && 2 * x2 >= 1 + x5 && x3 > 0 && x1 = 1 + x5 f_752(v1150:0, sum~cons_1~v1299:0, v1165:0, v1166:0, v1168:0, v1162:0) -> f_752(v1150:0, v1299:0, v1165:0, v1166:0, v1168:0, 1 + v1299:0) :|: v1299:0 < 1 && v1162:0 < 3 && v1299:0 > -1 && sum~cons_1~v1299:0 = 1 + v1299:0 f_752(x6, x7, x8, x9, x10, x11) -> f_714(x6, x7, 1, x10, x11) :|: x7 > 1 && x11 > 2 && x6 > 2 && x9 > 3 && x8 > 1 ---------------------------------------- (10) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (11) Obligation: Rules: f_752(x6:0, x7:0, x8:0, x9:0, x10:0, x11:0) -> f_714(x6:0, x7:0, 1, x10:0, x11:0) :|: x9:0 > 3 && x8:0 > 1 && x6:0 > 2 && x11:0 > 2 && x7:0 > 1 f_714(v937:0:0, v947:0:0, v949:0:0, v953:0:0, v954:0:0) -> f_714(v937:0:0, v947:0:0, 2 * v949:0:0, 1 + v953:0:0, v954:0:0) :|: v954:0:0 > 3 && v937:0:0 > 3 && v947:0:0 > 2 * v949:0:0 && v947:0:0 > 2 && 2 * v949:0:0 > 1 && v953:0:0 > 0 f_752(v1150:0:0, sum~cons_1~v1299:0:0, v1165:0:0, v1166:0:0, v1168:0:0, v1162:0:0) -> f_752(v1150:0:0, v1299:0:0, v1165:0:0, v1166:0:0, v1168:0:0, 1 + v1299:0:0) :|: v1299:0:0 < 1 && v1162:0:0 < 3 && v1299:0:0 > -1 && sum~cons_1~v1299:0:0 = 1 + v1299:0:0 f_714(x:0, sum~cons_1~x5:0, x2:0, x3:0, x4:0) -> f_752(x:0, x5:0, x2:0, 2 * x2:0, 1 + x3:0, 1 + x5:0) :|: 2 * x2:0 >= 1 + x5:0 && x3:0 > 0 && x5:0 > -1 && 2 * x2:0 > 1 && sum~cons_1~x5:0 = 1 + x5:0 ---------------------------------------- (12) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f_752 ] = 2*f_752_2 + 1 [ f_714 ] = 2*f_714_2 The following rules are decreasing: f_752(x6:0, x7:0, x8:0, x9:0, x10:0, x11:0) -> f_714(x6:0, x7:0, 1, x10:0, x11:0) :|: x9:0 > 3 && x8:0 > 1 && x6:0 > 2 && x11:0 > 2 && x7:0 > 1 f_752(v1150:0:0, sum~cons_1~v1299:0:0, v1165:0:0, v1166:0:0, v1168:0:0, v1162:0:0) -> f_752(v1150:0:0, v1299:0:0, v1165:0:0, v1166:0:0, v1168:0:0, 1 + v1299:0:0) :|: v1299:0:0 < 1 && v1162:0:0 < 3 && v1299:0:0 > -1 && sum~cons_1~v1299:0:0 = 1 + v1299:0:0 f_714(x:0, sum~cons_1~x5:0, x2:0, x3:0, x4:0) -> f_752(x:0, x5:0, x2:0, 2 * x2:0, 1 + x3:0, 1 + x5:0) :|: 2 * x2:0 >= 1 + x5:0 && x3:0 > 0 && x5:0 > -1 && 2 * x2:0 > 1 && sum~cons_1~x5:0 = 1 + x5:0 The following rules are bounded: f_752(x6:0, x7:0, x8:0, x9:0, x10:0, x11:0) -> f_714(x6:0, x7:0, 1, x10:0, x11:0) :|: x9:0 > 3 && x8:0 > 1 && x6:0 > 2 && x11:0 > 2 && x7:0 > 1 f_714(v937:0:0, v947:0:0, v949:0:0, v953:0:0, v954:0:0) -> f_714(v937:0:0, v947:0:0, 2 * v949:0:0, 1 + v953:0:0, v954:0:0) :|: v954:0:0 > 3 && v937:0:0 > 3 && v947:0:0 > 2 * v949:0:0 && v947:0:0 > 2 && 2 * v949:0:0 > 1 && v953:0:0 > 0 f_752(v1150:0:0, sum~cons_1~v1299:0:0, v1165:0:0, v1166:0:0, v1168:0:0, v1162:0:0) -> f_752(v1150:0:0, v1299:0:0, v1165:0:0, v1166:0:0, v1168:0:0, 1 + v1299:0:0) :|: v1299:0:0 < 1 && v1162:0:0 < 3 && v1299:0:0 > -1 && sum~cons_1~v1299:0:0 = 1 + v1299:0:0 f_714(x:0, sum~cons_1~x5:0, x2:0, x3:0, x4:0) -> f_752(x:0, x5:0, x2:0, 2 * x2:0, 1 + x3:0, 1 + x5:0) :|: 2 * x2:0 >= 1 + x5:0 && x3:0 > 0 && x5:0 > -1 && 2 * x2:0 > 1 && sum~cons_1~x5:0 = 1 + x5:0 ---------------------------------------- (13) Obligation: Rules: f_714(v937:0:0, v947:0:0, v949:0:0, v953:0:0, v954:0:0) -> f_714(v937:0:0, v947:0:0, 2 * v949:0:0, 1 + v953:0:0, v954:0:0) :|: v954:0:0 > 3 && v937:0:0 > 3 && v947:0:0 > 2 * v949:0:0 && v947:0:0 > 2 && 2 * v949:0:0 > 1 && v953:0:0 > 0 ---------------------------------------- (14) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (15) Obligation: Rules: f_714(v937:0:0:0, v947:0:0:0, v949:0:0:0, v953:0:0:0, v954:0:0:0) -> f_714(v937:0:0:0, v947:0:0:0, 2 * v949:0:0:0, 1 + v953:0:0:0, v954:0:0:0) :|: 2 * v949:0:0:0 > 1 && v953:0:0:0 > 0 && v947:0:0:0 > 2 && v947:0:0:0 > 2 * v949:0:0:0 && v937:0:0:0 > 3 && v954:0:0:0 > 3 ---------------------------------------- (16) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f_714 ] = -1*f_714_3 + 1/2*f_714_2 The following rules are decreasing: f_714(v937:0:0:0, v947:0:0:0, v949:0:0:0, v953:0:0:0, v954:0:0:0) -> f_714(v937:0:0:0, v947:0:0:0, 2 * v949:0:0:0, 1 + v953:0:0:0, v954:0:0:0) :|: 2 * v949:0:0:0 > 1 && v953:0:0:0 > 0 && v947:0:0:0 > 2 && v947:0:0:0 > 2 * v949:0:0:0 && v937:0:0:0 > 3 && v954:0:0:0 > 3 The following rules are bounded: f_714(v937:0:0:0, v947:0:0:0, v949:0:0:0, v953:0:0:0, v954:0:0:0) -> f_714(v937:0:0:0, v947:0:0:0, 2 * v949:0:0:0, 1 + v953:0:0:0, v954:0:0:0) :|: 2 * v949:0:0:0 > 1 && v953:0:0:0 > 0 && v947:0:0:0 > 2 && v947:0:0:0 > 2 * v949:0:0:0 && v937:0:0:0 > 3 && v954:0:0:0 > 3 ---------------------------------------- (17) YES ---------------------------------------- (18) Obligation: SCC ---------------------------------------- (19) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 19 rulesP rules: f_513(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v326, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_514(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v326, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_514(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v326, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_515(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v326, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_515(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v326, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_516(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_516(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_517(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: v327 < v315 && 3 <= v315 f_517(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_519(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_519(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_521(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: TRUE f_521(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_523(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_523(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v326, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_525(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_525(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_527(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: v341 = 2 * v327 && 4 <= v341 f_527(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_529(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_529(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_531(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: TRUE f_531(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_533(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_533(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_535(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_535(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_537(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: v345 = 1 + v329 && 2 <= v345 f_537(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_539(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 f_539(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_541(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: TRUE f_541(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_543(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: TRUE f_543(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_512(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v327, v341, v329, v345, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: TRUE f_512(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v326, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) -> f_513(v315, v316, v317, v318, v319, v320, v321, v322, v323, v324, 1, v326, v327, v328, v329, v330, v331, v332, v333, v334, v335, v336, v337, v338, v339, 0, 3, 7, 2, 4, 8) :|: 0 = 0 Combined rules. Obtained 1 rulesP rules: f_513(v315:0, v316:0, v317:0, v318:0, v319:0, v320:0, v321:0, v322:0, v323:0, v324:0, 1, v326:0, v327:0, v328:0, v329:0, v330:0, v331:0, v332:0, v333:0, v334:0, v335:0, v336:0, v337:0, v338:0, v339:0, 0, 3, 7, 2, 4, 8) -> f_513(v315:0, v316:0, v317:0, v318:0, v319:0, v320:0, v321:0, v322:0, v323:0, v324:0, 1, v327:0, 2 * v327:0, v329:0, 1 + v329:0, v330:0, v331:0, v332:0, v333:0, v334:0, v335:0, v336:0, v337:0, v338:0, v339:0, 0, 3, 7, 2, 4, 8) :|: v315:0 > 2 && v327:0 < v315:0 && v329:0 > 0 && 3 < 2 * v327:0 Filtered unneeded arguments: f_513(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31) -> f_513(x1, x13, x15) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_513(v315:0, v327:0, v329:0) -> f_513(v315:0, 2 * v327:0, 1 + v329:0) :|: v327:0 < v315:0 && v315:0 > 2 && 3 < 2 * v327:0 && v329:0 > 0 ---------------------------------------- (20) Obligation: Rules: f_513(v315:0, v327:0, v329:0) -> f_513(v315:0, 2 * v327:0, 1 + v329:0) :|: v327:0 < v315:0 && v315:0 > 2 && 3 < 2 * v327:0 && v329:0 > 0 ---------------------------------------- (21) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (22) Obligation: Rules: f_513(v315:0:0, v327:0:0, v329:0:0) -> f_513(v315:0:0, 2 * v327:0:0, 1 + v329:0:0) :|: 3 < 2 * v327:0:0 && v329:0:0 > 0 && v315:0:0 > 2 && v327:0:0 < v315:0:0 ---------------------------------------- (23) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f_513(x, x1, x2)] = -2 + x - x1 + x2 The following rules are decreasing: f_513(v315:0:0, v327:0:0, v329:0:0) -> f_513(v315:0:0, 2 * v327:0:0, 1 + v329:0:0) :|: 3 < 2 * v327:0:0 && v329:0:0 > 0 && v315:0:0 > 2 && v327:0:0 < v315:0:0 The following rules are bounded: f_513(v315:0:0, v327:0:0, v329:0:0) -> f_513(v315:0:0, 2 * v327:0:0, 1 + v329:0:0) :|: 3 < 2 * v327:0:0 && v329:0:0 > 0 && v315:0:0 > 2 && v327:0:0 < v315:0:0 ---------------------------------------- (24) YES ---------------------------------------- (25) Obligation: SCC ---------------------------------------- (26) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 21 rulesP rules: f_323(v30, v31, v32, v33, v34, v35, v36, v37, v38, v39, v40, 1, 0, v43, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_326(v30, v31, v32, v33, v34, v35, v36, v37, v38, v39, v43, 1, v40, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_326(v30, v31, v32, v33, v34, v35, v36, v37, v38, v39, v43, 1, v40, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_329(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 <= v43 && v40 = 1 && v43 = 0 && 0 = 0 f_329(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_332(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_332(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_335(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: TRUE f_335(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_338(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_338(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_341(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: TRUE f_341(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_345(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: TRUE f_345(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_349(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_349(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_352(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_352(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_355(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_355(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_358(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_358(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_361(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_361(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_364(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: TRUE f_364(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_367(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_367(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_370(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_370(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_373(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_373(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_376(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 f_376(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_379(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: TRUE f_379(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_382(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: TRUE f_382(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_320(1, v31, v32, v33, v34, v35, v36, v37, v38, v39, 0, 1, 0, -1, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: TRUE f_320(v30, v31, v32, v33, v34, v35, v36, v37, v38, v39, v40, 1, 0, v43, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) -> f_323(v30, v31, v32, v33, v34, v35, v36, v37, v38, v39, v40, 1, 0, v43, v44, v45, v46, v47, v48, v49, v50, v51, v52, v53, 3, 7, 4, 8) :|: 0 = 0 Combined rules. Obtained 1 rulesP rules: f_323(v30:0, v31:0, v32:0, v33:0, v34:0, v35:0, v36:0, v37:0, v38:0, v39:0, 1, 1, 0, 0, v44:0, v45:0, v46:0, v47:0, v48:0, v49:0, v50:0, v51:0, v52:0, v53:0, 3, 7, 4, 8) -> f_323(1, v31:0, v32:0, v33:0, v34:0, v35:0, v36:0, v37:0, v38:0, v39:0, 0, 1, 0, -1, v44:0, v45:0, v46:0, v47:0, v48:0, v49:0, v50:0, v51:0, v52:0, v53:0, 3, 7, 4, 8) :|: TRUE Filtered unneeded arguments: f_323(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28) -> f_323(x11, x14) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_323(cons_1, cons_0) -> f_323(0, -1) :|: TRUE && cons_1 = 1 && cons_0 = 0 ---------------------------------------- (27) Obligation: Rules: f_323(cons_1, cons_0) -> f_323(0, -1) :|: TRUE && cons_1 = 1 && cons_0 = 0 ---------------------------------------- (28) TerminationGraphProcessor (EQUIVALENT) Constructed the termination graph and obtained no non-trivial SCC(s). ---------------------------------------- (29) YES