/export/starexec/sandbox2/solver/bin/starexec_run_standard /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox2/benchmark/theBenchmark.xml # AProVE Commit ID: c69e44bd14796315568835c1ffa2502984884775 mhark 20210624 unpublished Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) QTRS Reverse [EQUIVALENT, 0 ms] (2) QTRS (3) RFCMatchBoundsTRSProof [EQUIVALENT, 0 ms] (4) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: half(0) -> 0 half(s(0)) -> 0 half(s(s(x))) -> s(half(x)) bits(0) -> 0 bits(s(x)) -> s(bits(half(s(x)))) Q is empty. ---------------------------------------- (1) QTRS Reverse (EQUIVALENT) We applied the QTRS Reverse Processor [REVERSE]. ---------------------------------------- (2) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: 0'(half(x)) -> 0'(x) 0'(s(half(x))) -> 0'(x) s(s(half(x))) -> half(s(x)) 0'(bits(x)) -> 0'(x) s(bits(x)) -> s(half(bits(s(x)))) Q is empty. ---------------------------------------- (3) RFCMatchBoundsTRSProof (EQUIVALENT) Termination of the TRS R could be shown with a Match Bound [MATCHBOUNDS1,MATCHBOUNDS2] of 1. This implies Q-termination of R. The following rules were used to construct the certificate: 0'(half(x)) -> 0'(x) 0'(s(half(x))) -> 0'(x) s(s(half(x))) -> half(s(x)) 0'(bits(x)) -> 0'(x) s(bits(x)) -> s(half(bits(s(x)))) The certificate found is represented by the following graph. The certificate consists of the following enumerated nodes: 68, 69, 70, 71, 72, 73, 74, 75, 76, 77 Node 68 is start node and node 69 is final node. Those nodes are connected through the following edges: * 68 to 69 labelled 0'_1(0), 0'_1(1)* 68 to 70 labelled half_1(0)* 68 to 71 labelled s_1(0)* 69 to 69 labelled #_1(0)* 70 to 69 labelled s_1(0)* 70 to 74 labelled half_1(1)* 70 to 75 labelled s_1(1)* 71 to 72 labelled half_1(0)* 72 to 73 labelled bits_1(0)* 73 to 69 labelled s_1(0)* 73 to 74 labelled half_1(1)* 73 to 75 labelled s_1(1)* 74 to 69 labelled s_1(1)* 74 to 74 labelled half_1(1)* 74 to 75 labelled s_1(1)* 75 to 76 labelled half_1(1)* 76 to 77 labelled bits_1(1)* 77 to 69 labelled s_1(1)* 77 to 74 labelled half_1(1)* 77 to 75 labelled s_1(1) ---------------------------------------- (4) YES