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SRS_Standard 2019-03-29 03.29 pair #432294139
details
property
value
status
complete
benchmark
1-matchbox.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n057.star.cs.uiowa.edu
space
Secret_06_SRS
run statistics
property
value
solver
AProVE
configuration
standard
runtime (wallclock)
66.2161 seconds
cpu usage
256.81
user time
252.47
system time
4.34043
max virtual memory
6.2406284E7
max residence set size
7521472.0
stage attributes
key
value
starexec-result
NO
output
256.60/66.04 NO 256.72/66.04 proof of /export/starexec/sandbox/benchmark/theBenchmark.xml 256.72/66.04 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 256.72/66.04 256.72/66.04 256.72/66.04 Termination w.r.t. Q of the given QTRS could be disproven: 256.72/66.04 256.72/66.04 (0) QTRS 256.72/66.04 (1) NonTerminationProof [COMPLETE, 10.1 s] 256.72/66.04 (2) NO 256.72/66.04 256.72/66.04 256.72/66.04 ---------------------------------------- 256.72/66.04 256.72/66.04 (0) 256.72/66.04 Obligation: 256.72/66.04 Q restricted rewrite system: 256.72/66.04 The TRS R consists of the following rules: 256.72/66.04 256.72/66.04 a(a(b(b(x1)))) -> b(b(b(a(a(a(x1)))))) 256.72/66.04 a(x1) -> x1 256.72/66.04 256.72/66.04 Q is empty. 256.72/66.04 256.72/66.04 ---------------------------------------- 256.72/66.04 256.72/66.04 (1) NonTerminationProof (COMPLETE) 256.72/66.04 We used the non-termination processor [OPPELT08] to show that the SRS problem is infinite. 256.72/66.04 256.72/66.04 Found the self-embedding DerivationStructure: 256.72/66.04 "a a b b a b b b b b b a b b b -> b b b b b b b b b a a b b a b b b b b b a b b b a a a" 256.72/66.04 a a b b a b b b b b b a b b b -> b b b b b b b b b a a b b a b b b b b b a b b b a a a 256.72/66.04 by OverlapClosure OC 2"a a b b a b b b b b b a b b -> b b b b b b b b b a a b b a b b b b b b a a a b 256.72/66.04 by OverlapClosure OC 3"a a b b a b b b b b b a b b -> b b b b b b b b b a a b b a b b b a a b b b 256.72/66.04 by OverlapClosure OC 2"a a b b a b b b b b b -> b b b b b b b b b a a b b a b b b a a a 256.72/66.04 by OverlapClosure OC 2"a a b b a b b b b -> b b b b b b b b b a a b b a a a 256.72/66.04 by OverlapClosure OC 3"a a b b a b b b b -> b b b b b b a a b b b b a a a 256.72/66.04 by OverlapClosure OC 3"a a b b a b b b b -> b b b b b b a a a b b b b a a a 256.72/66.04 by OverlapClosure OC 2"a a b b a b b -> b b b b b b a a a b a a 256.72/66.04 by OverlapClosure OC 3"a a b b a b b -> b b b a a b b b a a 256.72/66.04 by OverlapClosure OC 2"a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)""a a b b -> b b b a a 256.72/66.04 by OverlapClosure OC 2"a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)""a -> 256.72/66.04 by original rule (OC 1)""""a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)"""a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)"""a -> 256.72/66.04 by original rule (OC 1)"""a a b b -> b b b a a 256.72/66.04 by OverlapClosure OC 2"a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)""a -> 256.72/66.04 by original rule (OC 1)""""a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)"""a a b b -> b b b 256.72/66.04 by OverlapClosure OC 2"a a b b -> b b b a 256.72/66.04 by OverlapClosure OC 2"a a b b -> b b b a a 256.72/66.04 by OverlapClosure OC 2"a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)""a -> 256.72/66.04 by original rule (OC 1)"""a -> 256.72/66.04 by original rule (OC 1)"""a -> 256.72/66.04 by original rule (OC 1)""""a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)"""a a b b -> b b b a a a 256.72/66.04 by original rule (OC 1)" 256.72/66.04 256.72/66.04 ---------------------------------------- 256.72/66.04 256.72/66.04 (2) 256.72/66.04 NO 256.76/66.21 EOF
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