details

property	value
status	complete
benchmark	Ex1_Luc04b_Z.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n181.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	muterm 6.0.3
configuration	default
runtime (wallclock)	0.0175569 seconds
cpu usage	0.018054
user time	0.005975
system time	0.012079
max virtual memory	113188.0
max residence set size	4116.0

stage attributes

key	value
starexec-result	NO

output

NO Problem 1: (VAR v_NonEmpty:S X:S XS:S) (RULES activate(n__incr(X:S)) -> incr(X:S) activate(X:S) -> X:S head(cons(X:S,XS:S)) -> X:S incr(cons(X:S,XS:S)) -> cons(s(X:S),n__incr(activate(XS:S))) incr(X:S) -> n__incr(X:S) nats -> cons(0,n__incr(nats)) odds -> incr(pairs) pairs -> cons(0,n__incr(odds)) tail(cons(X:S,XS:S)) -> activate(XS:S) ) Problem 1: Dependency Pairs Processor: -> Pairs: ACTIVATE(n__incr(X:S)) -> INCR(X:S) INCR(cons(X:S,XS:S)) -> ACTIVATE(XS:S) NATS -> NATS ODDS -> INCR(pairs) ODDS -> PAIRS PAIRS -> ODDS TAIL(cons(X:S,XS:S)) -> ACTIVATE(XS:S) -> Rules: activate(n__incr(X:S)) -> incr(X:S) activate(X:S) -> X:S head(cons(X:S,XS:S)) -> X:S incr(cons(X:S,XS:S)) -> cons(s(X:S),n__incr(activate(XS:S))) incr(X:S) -> n__incr(X:S) nats -> cons(0,n__incr(nats)) odds -> incr(pairs) pairs -> cons(0,n__incr(odds)) tail(cons(X:S,XS:S)) -> activate(XS:S) Problem 1: Infinite Processor: -> Pairs: ACTIVATE(n__incr(X:S)) -> INCR(X:S) INCR(cons(X:S,XS:S)) -> ACTIVATE(XS:S) NATS -> NATS ODDS -> INCR(pairs) ODDS -> PAIRS PAIRS -> ODDS TAIL(cons(X:S,XS:S)) -> ACTIVATE(XS:S) -> Rules: activate(n__incr(X:S)) -> incr(X:S) activate(X:S) -> X:S head(cons(X:S,XS:S)) -> X:S incr(cons(X:S,XS:S)) -> cons(s(X:S),n__incr(activate(XS:S))) incr(X:S) -> n__incr(X:S) nats -> cons(0,n__incr(nats)) odds -> incr(pairs) pairs -> cons(0,n__incr(odds)) tail(cons(X:S,XS:S)) -> activate(XS:S) -> Pairs in cycle: NATS -> NATS The problem is infinite. popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to TRS Standard